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[209.132.180.67]) by mx.google.com with ESMTP id l3si3696130pfb.377.2018.03.21.14.44.18; Wed, 21 Mar 2018 14:44:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753796AbeCUVnD (ORCPT + 99 others); Wed, 21 Mar 2018 17:43:03 -0400 Received: from mga04.intel.com ([192.55.52.120]:50753 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753704AbeCUVnA (ORCPT ); Wed, 21 Mar 2018 17:43:00 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Mar 2018 14:42:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,341,1517904000"; d="scan'208";a="26452249" Received: from dph9ls1.fm.intel.com (HELO intel.com) ([10.80.209.182]) by fmsmga008.fm.intel.com with ESMTP; 21 Mar 2018 14:42:59 -0700 Date: Wed, 21 Mar 2018 14:35:06 -0700 From: Ivan Gorinov To: Thomas Gleixner , Frank Rowand , Andy Shevchenko Cc: Linux Kernel Mailing List , Ingo Molnar , Rob Herring , Mark Rutland Subject: [PATCH v7 1/2] of: Documentation: Specify local APIC ID in "reg" Message-ID: <1372456377308653dcb11fe10dafa45dda057f9b.1521667677.git.ivan.gorinov@intel.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use the "reg" property to specify the processor's local APIC ID instead of setting it to the "cpu" node index in Device Tree. Local APIC ID is assigned by hardware and visible in the APIC ID register. Some processor models allow APIC ID to be changed by software, but CPUID instruction executed with %eax = 0x0b always returns the initial ID in %edx. Local APIC ID does not match the DT "cpu" node index in many systems. Signed-off-by: Ivan Gorinov --- Documentation/devicetree/bindings/x86/ce4100.txt | 37 ++++++++++++++++++------ 1 file changed, 28 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/x86/ce4100.txt b/Documentation/devicetree/bindings/x86/ce4100.txt index b49ae59..4bbfed1 100644 --- a/Documentation/devicetree/bindings/x86/ce4100.txt +++ b/Documentation/devicetree/bindings/x86/ce4100.txt @@ -7,17 +7,36 @@ Many of the "generic" devices like HPET or IO APIC have the ce4100 name in their compatible property because they first appeared in this SoC. -The CPU node ------------- - cpu@0 { - device_type = "cpu"; - compatible = "intel,ce4100"; - reg = <0>; - lapic = <&lapic0>; +The CPU nodes +------------- + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0x00 { + device_type = "cpu"; + compatible = "intel,ce4100"; + reg = <0x00>; + }; + + cpu@0x02 { + device_type = "cpu"; + compatible = "intel,ce4100"; + reg = <0x02>; + }; }; -The reg property describes the CPU number. The lapic property points to -the local APIC timer. +A "cpu" node describes one logical processor (hardware thread). + +Required properties: + +- device_type + Device type, must be "cpu". + +- reg + Local APIC ID, the unique number assigned to each processor by + system hardware. The SoC node ------------ -- 2.7.4