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[209.132.180.67]) by mx.google.com with ESMTP id 70-v6si6289924ple.639.2018.03.22.06.02.14; Thu, 22 Mar 2018 06:02:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=MEMm+i8f; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755172AbeCVNAy (ORCPT + 99 others); Thu, 22 Mar 2018 09:00:54 -0400 Received: from mail-yb0-f196.google.com ([209.85.213.196]:46847 "EHLO mail-yb0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754792AbeCVNAs (ORCPT ); Thu, 22 Mar 2018 09:00:48 -0400 Received: by mail-yb0-f196.google.com with SMTP id t5-v6so2879623ybg.13; Thu, 22 Mar 2018 06:00:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SifEabFKuDUm0sjFPLAZbLsou7qG9ZFEsyKz06z7oqQ=; b=MEMm+i8f8gMMXE+ixp5sJLITnL5s5ySJuTSiabZWA4vDKWhvudN8r935IjuYiVANdw rKnHWYsVzb23WZy+kM8m5Mz7pAw0hcPmZx2GwYN6O2sZxQtZCZWGhYpv3WXyZdlRJPVk fhF1RvWKgTNMpWEePCgD4bwRrSjcpGZyfPkbaRPwUByx7dYqqs0jnc1FhH62wwvYcWvQ BIawINQsL6bwFlWWOfshd+09gOYNSssSnxujNFt23d/3/RKe+l1BmRA07Tm/UQOMIaLE fJSjBLLP5SC3+F0e1HNMDWOoaXkq8yJc18ns4ymTNVWNGxkBVFuZr936Or/pi/UXwK09 Y5QA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SifEabFKuDUm0sjFPLAZbLsou7qG9ZFEsyKz06z7oqQ=; b=S+U9711b1uhLZvHSrYWbwetB14wjoS+vClkIn8G4Wtqq55DHchoteFd1/maQrc/ibg DVBeFsGca5tlAqXSds+iaWNAhPc/z6kY0oCKUK2In6mFQqVr/bjLlCEIngXQapauMGDB FCTWSbUQzKwbrazWZEdZEEJs4wFxgWneRkPjZu+ObRHEFzfWXkVHEUAL+46TwH92MANC QV6UX6/pQCD3qPj8ScC7fRdY5lcoXww7RdxPBHlAVAZ56DnuP1vDqD4k+NqxgNeziUSD oz9fBoiXbTrhKClAXJ7bBlwMOPIimMrO1l1qlQ594/P+R0c8wsDeh4G8lC0rbm/DYa8z rFwQ== X-Gm-Message-State: AElRT7Fv+hyPMnQuOzABdPky8yoZfDwzwNSLe2VfPcF/oobEMoxd55T/ LWkr5PlfXvr/G8uMQkM1jBE= X-Received: by 2002:a25:3d86:: with SMTP id k128-v6mr14119308yba.392.1521723647950; Thu, 22 Mar 2018 06:00:47 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id h7sm502536ywf.100.2018.03.22.06.00.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 22 Mar 2018 06:00:47 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: andy.shevchenko@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v4 6/7] gpio: gpio-mm: Implement get_multiple callback Date: Thu, 22 Mar 2018 09:00:42 -0400 Message-Id: X-Mailer: git-send-email 2.16.2 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Diamond Systems GPIO-MM series of devices contain two 82C55A devices, which each feature three 8-bit ports of I/O. Since eight input lines are acquired on a single port input read, the GPIO-MM GPIO driver may improve multiple input reads by utilizing a get_multiple callback. This patch implements the gpiomm_gpio_get_multiple function which serves as the respective get_multiple callback. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 47 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index 11ade5b288f8..d496cc56c2a2 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -14,6 +14,7 @@ * This driver supports the following Diamond Systems devices: GPIO-MM and * GPIO-MM-12. */ +#include #include #include #include @@ -171,6 +172,51 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, + unsigned long *bits) +{ + struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); + size_t i; + const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + const unsigned int gpio_reg_size = 8; + unsigned int bits_offset; + size_t word_index; + unsigned int word_offset; + unsigned long word_mask; + const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + unsigned long port_state; + + /* clear bits array to a clean slate */ + bitmap_zero(bits, chip->ngpio); + + /* get bits are evaluated a gpio port register at a time */ + for (i = 0; i < ARRAY_SIZE(ports); i++) { + /* gpio offset in bits array */ + bits_offset = i * gpio_reg_size; + + /* word index for bits array */ + word_index = BIT_WORD(bits_offset); + + /* gpio offset within current word of bits array */ + word_offset = bits_offset % BITS_PER_LONG; + + /* mask of get bits for current gpio within current word */ + word_mask = mask[word_index] & (port_mask << word_offset); + if (!word_mask) { + /* no get bits in this port so skip to next one */ + continue; + } + + /* read bits from current gpio port */ + port_state = inb(gpiommgpio->base + ports[i]); + + /* store acquired bits at respective bits array offset */ + bits[word_index] |= port_state << word_offset; + } + + return 0; +} + static void gpiomm_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { @@ -268,6 +314,7 @@ static int gpiomm_probe(struct device *dev, unsigned int id) gpiommgpio->chip.direction_input = gpiomm_gpio_direction_input; gpiommgpio->chip.direction_output = gpiomm_gpio_direction_output; gpiommgpio->chip.get = gpiomm_gpio_get; + gpiommgpio->chip.get_multiple = gpiomm_gpio_get_multiple; gpiommgpio->chip.set = gpiomm_gpio_set; gpiommgpio->chip.set_multiple = gpiomm_gpio_set_multiple; gpiommgpio->base = base[id]; -- 2.16.2