Received: by 10.213.65.68 with SMTP id h4csp742337imn; Fri, 23 Mar 2018 15:08:26 -0700 (PDT) X-Google-Smtp-Source: AG47ELuMXy+9EtQDF6jJw5u/uQM0MHkzkRpq9aUujBKeuKtLDMCKcvioojmwmyQWC7n6EUxwoyy4 X-Received: by 10.99.167.6 with SMTP id d6mr11046913pgf.287.1521842906463; Fri, 23 Mar 2018 15:08:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521842906; cv=none; d=google.com; s=arc-20160816; b=mTZlZRSNti3rldIZ6G+EyPs6m40oFQ+GDms76T1DNynl/1gOlElE7qokdsO/5YB3VN rvmlj9Rvm/IUJcxbv6+nzfJ7EgPxVXEOlTovKaWmHZ0Cfnmpdo3F/aeRJ2pCmyz76sXw hIYx2Hu96YGMW+LBkPEf5QzB7D3IAs3Y84QOrfYxQ5+4kGXFLWw6dCvY8pxhyxvJBrrp TESANh5RPkO04OP5ZtQ++7Dn7ra9S7nfnbn4Zp5Jufme0y81/4hkhZyz7bQKiWsg6HSX 9i3CUnj4MuwEwj5DlgBU1YQ3PxOiFEjQTF9K4d5IlYzpY6cg5G5oJ/EkxoRMMeVFoU1g LoRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature:arc-authentication-results; bh=7fjPL5ILCoZDxc+Y8tHT7qz1xAWXbUYQUWYXeykWccM=; b=hUu4sQDEFDzCd4xdkkAvg8cNzPrRbJG938CKz54x47Z+/AySWxtBqbKDLXKBE78ykF Fx9zgcT9tUB3nSM8S8zryB8Pb0ofBVMk4ykJeBcXyU4hlRVPHINmPUV8bMke5OHswOhl nITHSlapFk8jULSMoB8GYnRXtnRcxkffXxAKci+UJ88WGVohGec/yNOQnnUMe+5pMdDs Z25AtNG+NcQvTzi1+3Guq+8clcWGsEb9T7TUnwaF/Pkl9C5y904vYOZyV04pW/jZIc8Y 7zAxWy/wwnf+LGR6g2mU76iRK8BRwA4b4rDiXPRQz0PEz8TFu7fEyfvqliC+TFuLnk0g Ilyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=UBV/usXs; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u1-v6si9527978plb.253.2018.03.23.15.08.10; Fri, 23 Mar 2018 15:08:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=UBV/usXs; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752169AbeCWWHG (ORCPT + 99 others); Fri, 23 Mar 2018 18:07:06 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:40710 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751541AbeCWWHF (ORCPT ); Fri, 23 Mar 2018 18:07:05 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=7fjPL5ILCoZDxc+Y8tHT7qz1xAWXbUYQUWYXeykWccM=; b=UBV/usXsN/5Nsm5+aEEfRBcHSBr3e0ME/a9DdN81zhlewgrnyTVUPq/EXk10tL0VCjTUzc8JTFbKflpr8W54eY94vK8Ghnq6eAp3smB8UUKUjmJt5HYX92MzC0tlbxsqWvgqWb5kvZBIV57+KQz2JYKakHrFBASqllhnN/tfAM0=; Received: from andrew by vps0.lunn.ch with local (Exim 4.84_2) (envelope-from ) id 1ezUpt-00062o-AB; Fri, 23 Mar 2018 23:06:57 +0100 Date: Fri, 23 Mar 2018 23:06:57 +0100 From: Andrew Lunn To: Florian Fainelli Cc: Alexandre Belloni , "David S . Miller" , Allan Nielsen , razvan.stefanescu@nxp.com, po.liu@nxp.com, Thomas Petazzoni , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, James Hogan Subject: Re: [PATCH net-next 6/8] MIPS: mscc: Add switch to ocelot Message-ID: <20180323220657.GY24361@lunn.ch> References: <20180323201117.8416-1-alexandre.belloni@bootlin.com> <20180323201117.8416-7-alexandre.belloni@bootlin.com> <20180323212230.GA12808@piout.net> <20180323213344.GV24361@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > > That is the trade off of having a standalone MDIO bus driver. Maybe > > add a phandle to the internal MDIO bus? The switch driver could then > > follow the phandle, and direct connect the internal PHYs? > > This is more or less what patch 7 does, right? Patch 7 does it in DT. I'm suggesting it could be done in C. It is hard wired, so there is no need to describe it in DT. Use the phandle to get the mdio bus, mdiobus_get_phy(, port) to get the phydev and then use phy_connect(). Andrew