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[209.132.180.67]) by mx.google.com with ESMTP id b10si6703740pgn.140.2018.03.23.15.36.59; Fri, 23 Mar 2018 15:37:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@broadcom.com header.s=google header.b=WovT61Xp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=broadcom.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752281AbeCWWgH (ORCPT + 99 others); Fri, 23 Mar 2018 18:36:07 -0400 Received: from mail-ot0-f195.google.com ([74.125.82.195]:38258 "EHLO mail-ot0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751677AbeCWWgF (ORCPT ); Fri, 23 Mar 2018 18:36:05 -0400 Received: by mail-ot0-f195.google.com with SMTP id 95-v6so14924405ote.5 for ; Fri, 23 Mar 2018 15:36:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=MXbnVg9+zcN6qBJdgVIW1dY2Xw6Whrvr728zb2EP3pY=; b=WovT61XpTDWYshCakVLirLjtUI68uEG9yqMZtL0i4pNqO/msy9iWG2h5Sn7hF1pcDX WTSh25wTu9Tj4zzOzI3jvN6qDJ7AheKWeLNpFUWZ+6I89B9SLZG08s3WtCiiU0KDJSUy IRuiU+mygIEJcDkn/t4fYTiAn+0ja7ZKhw91g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=MXbnVg9+zcN6qBJdgVIW1dY2Xw6Whrvr728zb2EP3pY=; b=V0UGBj1G9YdQt1x6NVkaAeYAW5/EU3Q6OACX9BLmMYycm+ZsNSlTX1MX6gsOGQjI+N JcBPVHs+0CabnIqyIdMuqXlXnC8U4nEGYTCFchDfAMfUg6BDe49bXeimnP6oP7J86X49 FGI7dFkFuE/QK1u3HBegztJITyRGyHhsKck6dM2Qw5NrF2d4SvCCMKMN96aWzspgYfPM CrsOU86/CI25cg0iIRrQwzGEDan2jIo+DcoVvcoXJQwdlGkqY6/7uBidnCYMqeCkwbZD MkvIoP6N/iof+7GDfK10s9LnIjvUPThYXjecb6BZ68nNfdz9BVYaKJa8buEkpdrhShjG fOWw== X-Gm-Message-State: AElRT7ExerD8jwiTJqhSkvvxbYL18kttcndiV2K+uTYheKYKVuF3Q3ZZ tqGIq8n/CN0ctBCU2GPNE4Ea7YwoTczHE3hKTayEFA== X-Received: by 2002:a9d:1b70:: with SMTP id l103-v6mr20907502otl.282.1521844565029; Fri, 23 Mar 2018 15:36:05 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a9d:4c0f:0:0:0:0:0 with HTTP; Fri, 23 Mar 2018 15:36:04 -0700 (PDT) In-Reply-To: <1521843791-21201-7-git-send-email-okaya@codeaurora.org> References: <1521843791-21201-1-git-send-email-okaya@codeaurora.org> <1521843791-21201-7-git-send-email-okaya@codeaurora.org> From: Michael Chan Date: Fri, 23 Mar 2018 15:36:04 -0700 Message-ID: Subject: Re: [PATCH v6 6/6] bnxt_en: Eliminate duplicate barriers on weakly-ordered archs To: Sinan Kaya Cc: Netdev , timur@codeaurora.org, sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, open list Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 23, 2018 at 3:23 PM, Sinan Kaya wrote: > Code includes wmb() followed by writel(). writel() already has a barrier on > some architectures like arm64. > > This ends up CPU observing two barriers back to back before executing the > register write. > > Create a new wrapper function with relaxed write operator. Use the new > wrapper when a write is following a wmb(). > > Since code already has an explicit barrier call, changing writel() to > writel_relaxed(). > > Also add mmiowb() so that write code doesn't move outside of scope. > > Signed-off-by: Sinan Kaya > --- > drivers/net/ethernet/broadcom/bnxt/bnxt.c | 3 ++- > drivers/net/ethernet/broadcom/bnxt/bnxt.h | 9 +++++++++ > 2 files changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c > index 1500243..fc8ea0d 100644 > --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c > +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c > @@ -1922,7 +1922,8 @@ static int bnxt_poll_work(struct bnxt *bp, struct bnxt_napi *bnapi, int budget) > /* Sync BD data before updating doorbell */ > wmb(); > > - bnxt_db_write(bp, db, DB_KEY_TX | prod); > + bnxt_db_write_relaxed(bp, db, DB_KEY_TX | prod); > + mmiowb(); Sorry for the late review. mmiowb() is not required here because we are in NAPI context, so only one CPU will be updating this doorbell. Other than that, it looks good. > } > > cpr->cp_raw_cons = raw_cons; > diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.h b/drivers/net/ethernet/broadcom/bnxt/bnxt.h > index 1989c47..5e453b9 100644 > --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.h > +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.h > @@ -1401,6 +1401,15 @@ static inline u32 bnxt_tx_avail(struct bnxt *bp, struct bnxt_tx_ring_info *txr) > ((txr->tx_prod - txr->tx_cons) & bp->tx_ring_mask); > } > > +/* For TX and RX ring doorbells with no ordering guarantee*/ > +static inline void bnxt_db_write_relaxed(struct bnxt *bp, void __iomem *db, > + u32 val) > +{ > + writel_relaxed(val, db); > + if (bp->flags & BNXT_FLAG_DOUBLE_DB) > + writel_relaxed(val, db); > +} > + > /* For TX and RX ring doorbells */ > static inline void bnxt_db_write(struct bnxt *bp, void __iomem *db, u32 val) > { > -- > 2.7.4 >