Received: by 10.213.65.68 with SMTP id h4csp1199258imn; Mon, 26 Mar 2018 02:53:33 -0700 (PDT) X-Google-Smtp-Source: AG47ELvXkzeqg5e/kDZ4nvmTZLFhrpekJ4ODmr+3ZHGIKbxgJKRxkygT8oM0Pl+6JdEPnPmBNJH5 X-Received: by 10.101.86.141 with SMTP id v13mr21027769pgs.353.1522058013922; Mon, 26 Mar 2018 02:53:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522058013; cv=none; d=google.com; s=arc-20160816; b=DBMeKjKnJ5/Q+dzryViJ+4MHEvWtiyY/n6GirdrB5Zx5UzJZB38vHCa2v4UjOUlHCo Z7NhYmy5yY81iSzaCv/NzCz/MuoWQgAuAovymKHnA0O6SBcWrSNjLyiaQ4RwSkxsfLlc +mEkAkN2+lCvrDqHeFGqBesUGs3imhcKVMmhwNNA4HW1evYOZVTZeOuCIHoKT5fWtG06 wj3impSF1xfmqFDVv2tTr/iDEnz+9QKOiabJs2akwonWa8LIHQvT373yBGyUewIHgToO Z3/U+avJSZGs0gFlNPbYcz/Ewo26f/jR1PjlZELuV3zffPOagirQ50aGPso7Gbj/1Iw8 ZtTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=lPyw0hmn0wh2K7yIBeCGgylvhYMr9gYMXMDBIKO0sXE=; b=UUkTqJ/WPbVTFak8e9e6r8CMfyBJsP0fqfMthlFh6pn0l8w04B+hSarbjPdF4jyTgz dQxKFJUtTi7RncoL/iAcG4jJpqNSPJc+Tto6uqCeFFs47TkxNO2v8SudWG5OHnbElywQ zZ83nY3ek45rTk8hNNu2ka6Mj28DRPjv9fVm+34ul2VE2dWHJGxcnEAqcFbPAR5KILm0 YKM7AOKxODocz9IDXvJ8bacyYmTtbFm990fV+fFGkt0s/n0kWgqv8d8qTceYNNRmQ02S vlSUxScsiS8f6R+FA8Ub13jQj5/fH1GfG3YYTNsnFjqgvl1UdtaKh34HeCTVVh2OjQzx TY8Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a6-v6si14028164pln.632.2018.03.26.02.53.18; Mon, 26 Mar 2018 02:53:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751896AbeCZJw2 (ORCPT + 99 others); Mon, 26 Mar 2018 05:52:28 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:34336 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751138AbeCZJw0 (ORCPT ); Mon, 26 Mar 2018 05:52:26 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id E505E2794AA From: Enric Balletbo i Serra To: Lee Jones , Daniel Thompson , Jingoo Han , Rob Herring , Pavel Machek , Heiko Stuebner Cc: Thierry Reding , Bartlomiej Zolnierkiewicz , Richard Purdie , Jacek Anaszewski , linux-pwm@vger.kernel.org, linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org, groeck@chromium.org, linux-rockchip@lists.infradead.org, linux-leds@vger.kernel.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: [PATCH v6 4/5] ARM: dts: rockchip: set PWM delay backlight settings for Veyron. Date: Mon, 26 Mar 2018 11:52:12 +0200 Message-Id: <20180326095213.18362-4-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180326095213.18362-1-enric.balletbo@collabora.com> References: <20180326095213.18362-1-enric.balletbo@collabora.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org For veyron the binding should provide both PWM timings, the delay between you enable the PWM and set the enable signal, and the delay between you disable the PWM signal and clear the enable signal. Update the binding accordingly, in this case the panels connected to the veyron boards have a symmetric power sequence, hence the same value is used. Signed-off-by: Enric Balletbo i Serra Acked-by: Pavel Machek --- Changes since v5: - None. Changes since v4: - Rebased on top of mainline. Changes since v3: - Use new -ms names for proprieties. Changes since v2: - Use new names for proprieties. Changes since v1: - Add this new patch to fix current binding on veyron. --- arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi index d752a315f884..5a8c7f3abb38 100644 --- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi @@ -96,7 +96,8 @@ pinctrl-names = "default"; pinctrl-0 = <&bl_en>; pwms = <&pwm0 0 1000000 0>; - pwm-delay-us = <10000>; + post-pwm-on-delay-ms = <10>; + pwm-off-delay-ms = <10>; }; gpio-charger { -- 2.16.2