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Date:   Tue, 27 Mar 2018 10:11:31 +0200
From:   Maxime Ripard <maxime.ripard@bootlin.com>
To:     Icenowy Zheng <icenowy@aosc.io>
Cc:     linux-arm-kernel@lists.infradead.org,
        Rob Herring <robh@kernel.org>, devicetree@vger.kernel.org,
        jernej.skrabec@siol.net, linux-sunxi@googlegroups.com,
        linux-kernel@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
        linux-clk@vger.kernel.org
Subject: Re: [linux-sunxi] Re: [PATCH 2/7] dt-bindings: add binding for the
 Allwinner A64 DE2 bus
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On Tue, Mar 27, 2018 at 07:31:18AM +0800, Icenowy Zheng wrote:
>=20
>=20
> =E4=BA=8E 2018=E5=B9=B43=E6=9C=8827=E6=97=A5 GMT+08:00 =E4=B8=8A=E5=8D=88=
6:22:58, Rob Herring <robh@kernel.org> =E5=86=99=E5=88=B0:
> >On Thu, Mar 22, 2018 at 02:08:43PM +0800, Icenowy Zheng wrote:
> >>=20
> >>=20
> >> =E4=BA=8E 2018=E5=B9=B43=E6=9C=8822=E6=97=A5 GMT+08:00 =E4=B8=8A=E5=8D=
=881:13:42, "Jernej =C5=A0krabec"
> ><jernej.skrabec@siol.net> =E5=86=99=E5=88=B0:
> >> >Hi all,
> >> >
> >> >Dne sreda, 21. marec 2018 ob 03:18:13 CET je Icenowy Zheng
> >napisal(a):
> >> >> =E4=BA=8E 2018=E5=B9=B43=E6=9C=8821=E6=97=A5 GMT+08:00 =E4=B8=8A=E5=
=8D=882:46:46, Maxime Ripard
> >> ><maxime.ripard@bootlin.com>=20
> >> >=E5=86=99=E5=88=B0:
> >> >> >On Sat, Mar 17, 2018 at 01:53:49AM +0800, Icenowy Zheng wrote:
> >> >> >> All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64
> >> >SoC
> >> >> >
> >> >> >to
> >> >> >
> >> >> >> be claimed, otherwise the whole DE2 space is inaccessible.
> >> >> >>=20
> >> >> >> Add a device tree binding of the DE2 part as a sub-bus.
> >> >> >
> >> >> >Where did you get the info that it was a bus?
> >> >>=20
> >> >> There's no direct evidence, just some guess.
> >> >>=20
> >> >> The DE2 is a whole part that is just allocated a memory
> >> >> space at the user manual, and the SRAM controls the
> >> >> access to all modules in the DE2.
> >> >>=20
> >> >> So it might be a bus.
> >> >>=20
> >> >> Implement it as a bus is a clear representation on A64.
> >> >
> >> >Since there is already syscon for same mmio region, we migh as well
> >use
> >> >it=20
> >> >when loading ccu-sun8i-de2 driver on A64.
> >> >
> >> >Other options, like SRAM driver or bus driver, might better
> >represent
> >> >HW, but=20
> >>=20
> >> I think the device tree should properly represent the HW,
> >> it's a basic requirment.
> >>=20
> >> >then we would have two DT nodes covering same mmio region, which I
> >> >think is=20
> >> >not really acceptable.
> >>=20
> >> It's acceptable, and DE2 is not the only user of SRAM controller so
> >far.
> >
> >No, it's not acceptable. Don't create overlapping mmio regions in DT.
>=20
> Then should the SRAM controller driver be configured to take the syscon?

We could have a single DT node that would export a syscon yes, just
like you did for the R40 ethernet case.

I'm not sure the SRAM controller itself needs to take the syscon, it
just can export its own.

Maxime

--=20
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com

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