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[209.132.180.67]) by mx.google.com with ESMTP id 79si717419pga.440.2018.03.27.04.10.37; Tue, 27 Mar 2018 04:10:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@ffwll.ch header.s=google header.b=M+ppaU6S; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751890AbeC0LJj (ORCPT + 99 others); Tue, 27 Mar 2018 07:09:39 -0400 Received: from mail-io0-f194.google.com ([209.85.223.194]:42132 "EHLO mail-io0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750993AbeC0LJi (ORCPT ); Tue, 27 Mar 2018 07:09:38 -0400 Received: by mail-io0-f194.google.com with SMTP id d5so27078860iob.9 for ; Tue, 27 Mar 2018 04:09:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc:content-transfer-encoding; bh=bzwFqBFZfr03qN02GJPo1VmCFzdNIaQsckoA5JiWIqw=; b=M+ppaU6SJgNNA2UXFd6usnDaTw5MAuNo62UXwbyxPOea8MJtuy0KfgPgrKURM3nvks dfR2lvuOk0+xW/G7OFGQAXFQ6E6SpS4Ku95ldnXgljMF++vCE7IcrkY0x4jUrZXJwKf8 w1PZk57AS+RdXaoD/6aFZLDb9muLvH14DfyqA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc:content-transfer-encoding; bh=bzwFqBFZfr03qN02GJPo1VmCFzdNIaQsckoA5JiWIqw=; b=XJ3m5TnxThEAQxWv9hFHUMbH0cuR5UhwF/AlAoEmnCKo3F6xNDKTap5Y0ZhYsExpVE EJmH15qD/6E1Kwb5/v0qIsgy48OpaUsKZfysqdQkRaAw+jMD8AMPJnoR+s/h9WwaMlE5 0ntPK/UN5iWIMPeEx/pVhvdda9DVQyzQ4ib5w//fC3JPOooBv+9tse9ZaKjkcYl4dXGZ tS4mWeHN5ezzcZRNF0FgZEeVJ99iT9fhCBcHzC4LDttnMMQbfyWxSnJKD48VY2RAcd+t ZaxFuITwN4ngeGavQD/s7wL2cvv5/fyvZFRr0FbzxmxwtDx9Y0KK4KRDh0xwukzCjktR JuZw== X-Gm-Message-State: AElRT7FyTUoHSawvxdiMKqt4xgWkde8yx1/MUsnto17ixqT/6Y+kgfTE 0e2hhCjseatINmiXuUpkVPsOKpSRwkuM5RkS1nThKA== X-Received: by 10.107.179.134 with SMTP id c128mr43639665iof.278.1522148977283; Tue, 27 Mar 2018 04:09:37 -0700 (PDT) MIME-Version: 1.0 Received: by 10.79.40.129 with HTTP; Tue, 27 Mar 2018 04:09:36 -0700 (PDT) X-Originating-IP: [212.51.149.109] In-Reply-To: <20180327095907.GA18146@arm.com> References: <1522083800-30100-1-git-send-email-ayan.halder@arm.com> <1522083800-30100-9-git-send-email-ayan.halder@arm.com> <20180327082903.GS14155@phenom.ffwll.local> <20180327095907.GA18146@arm.com> From: Daniel Vetter Date: Tue, 27 Mar 2018 13:09:36 +0200 X-Google-Sender-Auth: AjIlq8idPFcPnHcfIqp-9r1u43E Message-ID: Subject: Re: [PATCH 8/8] drm/arm/malidp: Added the late system pm functions To: Ayan Halder Cc: Liviu Dudau , Brian Starkey , Mali DP Maintainers , Dave Airlie , dri-devel , Linux Kernel Mailing List , nd Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 27, 2018 at 11:59 AM, Ayan Halder wrote: > On Tue, Mar 27, 2018 at 10:29:03AM +0200, Daniel Vetter wrote: >> On Mon, Mar 26, 2018 at 06:03:20PM +0100, Ayan Kumar Halder wrote: >> > malidp_pm_suspend_late checks if the runtime status is not suspended >> > and if so, invokes malidp_runtime_pm_suspend which disables the >> > display engine/core interrupts and the clocks. It sets the runtime sta= tus >> > as suspended. Subsequently, malidp_pm_resume_early will invoke >> > malidp_runtime_pm_resume which enables the clocks and the interrupts >> > (previously disabled) and sets the runtime status as active. >> > >> > Signed-off-by: Ayan Kumar Halder >> > Change-Id: I5f8c3d28f076314a1c9da2a46760a9c37039ccda >> >> Why exactly do you need late/early hooks? If you have dependencies with >> other devices, pls consider adding device_links instead. This here >> shouldn't be necessary. >> -Daniel > We need to late/early hooks to disable malidp interrupts and the > clocks. Yes, but why this ordering constraint? Why can't you just disable the interrupts/clocks in the normal suspend code. I see that the patch does this, I want to understand why it does it. -Daniel >> > --- >> > drivers/gpu/drm/arm/malidp_drv.c | 17 +++++++++++++++++ >> > 1 file changed, 17 insertions(+) >> > >> > diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/ma= lidp_drv.c >> > index bd44a6d..f6124d8 100644 >> > --- a/drivers/gpu/drm/arm/malidp_drv.c >> > +++ b/drivers/gpu/drm/arm/malidp_drv.c >> > @@ -766,8 +766,25 @@ static int __maybe_unused malidp_pm_resume(struct= device *dev) >> > return 0; >> > } >> > >> > +static int __maybe_unused malidp_pm_suspend_late(struct device *dev) >> > +{ >> > + if (!pm_runtime_status_suspended(dev)) { >> > + malidp_runtime_pm_suspend(dev); >> > + pm_runtime_set_suspended(dev); >> > + } >> > + return 0; >> > +} >> > + >> > +static int __maybe_unused malidp_pm_resume_early(struct device *dev) >> > +{ >> > + malidp_runtime_pm_resume(dev); >> > + pm_runtime_set_active(dev); >> > + return 0; >> > +} >> > + >> > static const struct dev_pm_ops malidp_pm_ops =3D { >> > SET_SYSTEM_SLEEP_PM_OPS(malidp_pm_suspend, malidp_pm_resume) \ >> > + SET_LATE_SYSTEM_SLEEP_PM_OPS(malidp_pm_suspend_late, malidp_pm_res= ume_early) \ >> > SET_RUNTIME_PM_OPS(malidp_runtime_pm_suspend, malidp_runtime_pm_re= sume, NULL) >> > }; >> > >> > -- >> > 2.7.4 >> > >> > _______________________________________________ >> > dri-devel mailing list >> > dri-devel@lists.freedesktop.org >> > https://lists.freedesktop.org/mailman/listinfo/dri-devel >> >> -- >> Daniel Vetter >> Software Engineer, Intel Corporation >> http://blog.ffwll.ch >> _______________________________________________ >> dri-devel mailing list >> dri-devel@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/dri-devel > IMPORTANT NOTICE: The contents of this email and any attachments are conf= idential and may also be privileged. If you are not the intended recipient,= please notify the sender immediately and do not disclose the contents to a= ny other person, use it for any purpose, or store or copy the information i= n any medium. Thank you. > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel --=20 Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch