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[2003:e4:1f19:3100:21f:3cff:fe37:b91b]) by smtp.gmail.com with ESMTPSA id k11sm3858714wmi.35.2018.03.27.15.57.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 27 Mar 2018 15:57:58 -0700 (PDT) Date: Wed, 28 Mar 2018 00:57:58 +0200 From: Thierry Reding To: Fabrice Gasnier Cc: alexandre.torgue@st.com, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, mcoquelin.stm32@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, benjamin.gaignard@linaro.org Subject: Re: [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer Message-ID: <20180327225757.GK28163@mithrandir> References: <1519392965-28235-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="YZQs1kEQY307C4ut" Content-Disposition: inline In-Reply-To: <1519392965-28235-1-git-send-email-fabrice.gasnier@st.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --YZQs1kEQY307C4ut Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Feb 23, 2018 at 02:36:02PM +0100, Fabrice Gasnier wrote: > Add missing generic #pwm-cells on STM32 LPTimer to allow initialization > of channel, period and polarity. >=20 > Fabrice Gasnier (1): > ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743 >=20 > Gerald Baeza (2): > dt-bindings: pwm-stm32-lp: add #pwm-cells > pwm: stm32: LPTimer: use 3 cells xlate >=20 > Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt | 3 +++ > arch/arm/boot/dts/stm32h743.dtsi | 5 +++++ > drivers/pwm/pwm-stm32-lp.c | 2 ++ > 3 files changed, 10 insertions(+) Applied patches 1 and 2, thanks. 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