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[209.132.180.67]) by mx.google.com with ESMTP id a11-v6si3345457plp.363.2018.03.28.05.11.29; Wed, 28 Mar 2018 05:11:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=SEPg7Xux; dkim=pass header.i=@codeaurora.org header.s=default header.b=i1ChSNZq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752169AbeC1MKh (ORCPT + 99 others); Wed, 28 Mar 2018 08:10:37 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:43798 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750799AbeC1MKf (ORCPT ); Wed, 28 Mar 2018 08:10:35 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id C389760C65; Wed, 28 Mar 2018 12:10:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522239034; bh=WQLK0MyYS47ITn5YAW0mnqBh2AUN+xoEwdIdL3OwpIs=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=SEPg7Xux7RmimX5EYpnqpsIT5+ZT9RJJYdJeOJzDrdqf8atUwwVC61l+PhvENR4Fs LGnrMrAgoE+V2xGspPtPib/ZW8uWpE9V98IzTViR538Yl5akEsyUf87CIzUbXcUmk8 dt7YVCvLOZgGPowrVV03dNZ9vQalU4wT1psWr5g4= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from [10.204.79.109] (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: cpandya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id CF03760224; Wed, 28 Mar 2018 12:10:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522239033; bh=WQLK0MyYS47ITn5YAW0mnqBh2AUN+xoEwdIdL3OwpIs=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=i1ChSNZqXxstTzheKmKrG+yQYalb53hO/X17UnG4jdSkxJA5yG1vHvnvhAjSTmJA2 8N5Sz2iqcfvpFFidAqrf7J1nyXV1irHRVLsNQy+PZzPdrRAmseBpk4KYmZB2UypF0G zWWRQq87sHLBwa7lRugTLDyUmfCn5QeNDd7ZEkEU= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org CF03760224 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=cpandya@codeaurora.org Subject: Re: [PATCH v6 0/4] Fix issues with huge mapping in ioremap for ARM64 To: catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, toshi.kani@hpe.com Cc: arnd@arndb.de, ard.biesheuvel@linaro.org, marc.zyngier@arm.com, james.morse@arm.com, kristina.martsenko@arm.com, takahiro.akashi@linaro.org, gregkh@linuxfoundation.org, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, akpm@linux-foundation.org References: <1522234731-27397-1-git-send-email-cpandya@codeaurora.org> From: Chintan Pandya Message-ID: Date: Wed, 28 Mar 2018 17:40:26 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <1522234731-27397-1-git-send-email-cpandya@codeaurora.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org I goofed up in making a patch file so enumeration is wrong. I'll upload v7 On 3/28/2018 4:28 PM, Chintan Pandya wrote: > This series of patches are follow up work (and depends on) > Toshi Kani 's patches "fix memory leak/ > panic in ioremap huge pages". > > This series of patches are tested on 4.9 kernel with Cortex-A75 > based SoC. > > These patches can also go into '-stable' branch (if accepted) > for 4.6 onwards. > > From V5->V6: > - Use __flush_tlb_kernel_pgtable() for both PUD and PMD. Remove > "bool tlb_inv" based variance as it is not need now > - Re-naming for consistency > > From V4->V5: > - Add new API __flush_tlb_kernel_pgtable(unsigned long addr) > for kernel addresses > > From V3->V4: > - Add header for 'addr' in x86 implementation > - Re-order pmd/pud clear and table free > - Avoid redundant TLB invalidatation in one perticular case > > From V2->V3: > - Use the exisiting page table free interface to do arm64 > specific things > > From V1->V2: > - Rebased my patches on top of "[PATCH v2 1/2] mm/vmalloc: > Add interfaces to free unmapped page table" > - Honored BBM for ARM64 > > Chintan Pandya (4): > ioremap: Update pgtable free interfaces with addr > arm64: tlbflush: Introduce __flush_tlb_kernel_pgtable > arm64: Implement page table free interfaces > Revert "arm64: Enforce BBM for huge IO/VMAP mappings" > > arch/arm64/include/asm/tlbflush.h | 6 ++++++ > arch/arm64/mm/mmu.c | 37 +++++++++++++++++++++++++------------ > arch/x86/mm/pgtable.c | 6 ++++-- > include/asm-generic/pgtable.h | 8 ++++---- > lib/ioremap.c | 4 ++-- > 5 files changed, 41 insertions(+), 20 deletions(-) > Chintan -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project