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[209.132.180.67]) by mx.google.com with ESMTP id s76si2896768pfi.412.2018.03.28.09.04.12; Wed, 28 Mar 2018 09:04:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=Hiz2NzVZ; dkim=pass header.i=@codeaurora.org header.s=default header.b=inalvNFX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753298AbeC1NIg (ORCPT + 99 others); Wed, 28 Mar 2018 09:08:36 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:59122 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752864AbeC1NIe (ORCPT ); Wed, 28 Mar 2018 09:08:34 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id CB04F60FEA; Wed, 28 Mar 2018 13:08:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522242513; bh=lssxAGTKsFbHbkkCI2Ixc/+yvMqORKiC9ZOsUIQkMJc=; h=From:To:Cc:Subject:Date:From; b=Hiz2NzVZA45OKyfnoc+8Fn8Qb1f0T3tjD6BJcuaVsCtQeBPLmD7m7vjCpDdlyxDFd 5BzeexySFOcPe0chwAK3IAjIsKdvdCQOMfHt4YQIZsJpJa+iwnSKm5HWamxfMb6lqz MimOrBmI77p/f6JdTj4s/YvpI9ifPY7bzfDEJTSw= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from hydcbspbld03.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: vviswana@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id BE0B860F61; Wed, 28 Mar 2018 13:08:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522242512; bh=lssxAGTKsFbHbkkCI2Ixc/+yvMqORKiC9ZOsUIQkMJc=; h=From:To:Cc:Subject:Date:From; b=inalvNFXmv9lGS0h8ePLvgoEZJDCNnCxaWjRUauXuTp16hsk/hX5AsTcj1EKtGkRA +seNU3WVsYNyqsK64hyCOtqFvacfgHK1/lw1Vuheu/zPLX8S5TJrtTYmWiwWxl+Wnq u6sU6azyiEtJMd1LzLAMGDTFeVvTIP7vMoPDD2s8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org BE0B860F61 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=vviswana@codeaurora.org From: Vijay Viswanath To: adrian.hunter@intel.com, ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, shawn.lin@rock-chips.com, linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org, asutoshd@codeaurora.org, stummala@codeaurora.org, venkatg@codeaurora.org, pramod.gurav@linaro.org, jeremymc@redhat.com, vviswana@codeaurora.org, bjorn.andersson@linaro.org, riteshh@codeaurora.org Subject: [PATCH V4 0/2] mmc: sdhci-msm: Configuring IO_PAD support for sdhci-msm Date: Wed, 28 Mar 2018 18:38:18 +0530 Message-Id: <1522242500-10556-1-git-send-email-vviswana@codeaurora.org> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain; charset=y Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From the HPG: In some platform, SDCC controller can be connected to either an eMMC device or an SD card. The PADs for SD card are dual-voltage that support 3v/1.8v. Those PADs have a control signal (io_pad_pwr_switch/mode18 ) that indicates whether the PAD works in 3v or 1.8v. For SD usage the default value of this signal is ‘0’, and SD driver changes it to ‘1’ as a part of voltage switching sequence. For eMMC usage, SW should configure this signal to ‘1’ and supply 1.8v to PADs before starting any activity on the eMMC BUS. To set this signal, write the following in the SDC1_SDCC_HC_VENDOR_SPECIFIC_FUNC register: HC_IO_PAD_PWR_SWITCH: bit 16 HC_IO_PAD_PWR_SWITCH_EN: bit 15 Changes since v1: Modified comments on io_pad related changes. Split some read+modify+write commands to multiple lines Changes since v2: IO_PAD_PWR_SWITCH_EN will be set only if we have info regarding what voltage is supported by the regulators. Replaced regulator_list_voltage() API with regulator_is_supported_voltage(). Changes since v3: Removed unnecessary prints and extra lines. Krishna Konda (1): mmc: sdhci-msm: support voltage pad switching Vijay Viswanath (1): mmc: sdhci-msm: Add support to store supported vdd-io voltages drivers/mmc/host/sdhci-msm.c | 99 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 97 insertions(+), 2 deletions(-) -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.