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[209.132.180.67]) by mx.google.com with ESMTP id j192si3758956pge.291.2018.03.29.02.42.42; Thu, 29 Mar 2018 02:42:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=PbGSH/mB; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752286AbeC2Jkn (ORCPT + 99 others); Thu, 29 Mar 2018 05:40:43 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:25285 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752254AbeC2Jkl (ORCPT ); Thu, 29 Mar 2018 05:40:41 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w2T9eWPx023878; Thu, 29 Mar 2018 04:40:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1522316432; bh=4Ut0nR9XnEKNXR3A+nBniI9BKZ1qqQq5a7kKf+cfhms=; h=Subject:To:References:CC:From:Date:In-Reply-To; b=PbGSH/mBwiTW4C+c+g6dqZx3IZqjgiUwx2+GyGjnOjb95ASKbMN5Gl6KireAaGH0C XxgG1loSgfupxOjzJmmM9WbPFV7ItYS1qcgWshq/XOiz0msCV/nliuLBaV+pD6OJ5d Fx9lM0+XeziLf2OpXXxWZJPSEy6VeF6tWXqpoRTE= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2T9eWeJ009935; Thu, 29 Mar 2018 04:40:32 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Thu, 29 Mar 2018 04:40:32 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Thu, 29 Mar 2018 04:40:32 -0500 Received: from [172.24.190.233] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2T9eTph009166; Thu, 29 Mar 2018 04:40:30 -0500 Subject: Re: [PATCH v5 03/12] PCI: endpoint: Setting BAR_5 to 64-bits wide is invalid To: Niklas Cassel , , Lorenzo Pieralisi , Bjorn Helgaas References: <20180328115018.31921-1-niklas.cassel@axis.com> <20180328115018.31921-4-niklas.cassel@axis.com> CC: Niklas Cassel , , From: Kishon Vijay Abraham I Message-ID: <8a247d0e-73ff-8524-4939-e0e444ff206e@ti.com> Date: Thu, 29 Mar 2018 15:10:29 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20180328115018.31921-4-niklas.cassel@axis.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 28 March 2018 05:20 PM, Niklas Cassel wrote: > Since a 64-bit BAR consists of a BAR pair, and since there is no > BAR after BAR_5, BAR_5 cannot be 64-bits wide. > > This sanity check is done in pci_epc_set_bar(), so that we don't need > to do this sanity check in all epc->ops->set_bar() implementations. > > Signed-off-by: Niklas Cassel > --- > drivers/pci/endpoint/pci-epc-core.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c > index 784e33d6f229..109d75f0b7d2 100644 > --- a/drivers/pci/endpoint/pci-epc-core.c > +++ b/drivers/pci/endpoint/pci-epc-core.c > @@ -310,7 +310,9 @@ int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, > int ret; > unsigned long irq_flags; > > - if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) > + if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions || > + (epf_bar->barno == BAR_5 && > + epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)) > return -EINVAL; It's getting a bit lengthy. I'd prefer two separate ifs as that might be legible. But otherwise Acked-by: Kishon Vijay Abraham I > > if (!epc->ops->set_bar) >