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[209.132.180.67]) by mx.google.com with ESMTP id j192si3758956pge.291.2018.03.29.02.43.52; Thu, 29 Mar 2018 02:44:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ybWKf3aP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752414AbeC2Jmy (ORCPT + 99 others); Thu, 29 Mar 2018 05:42:54 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:43907 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750820AbeC2Jmx (ORCPT ); Thu, 29 Mar 2018 05:42:53 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w2T9gjjq027337; Thu, 29 Mar 2018 04:42:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1522316565; bh=LTKcer1HKz0LkieyfmmTs2L4KLccjhwCCAGuvSKRSAA=; h=Subject:To:References:CC:From:Date:In-Reply-To; b=ybWKf3aP+RRjuZNGRW5apteTcqSwLcCuvb1WCbpOFNbtDb3RQJ123xNj0ZfJMeYMp z3f8uAda/6O1KsLL95ggLTJM3QmLl5tyVNNB6UDwexdzwLsFgVd/UhNPvQ/XIvGC9O tE72l8i7zcl+chPfTh4awEFjhYi/yiamOUbh1B/Y= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2T9gjZU026062; Thu, 29 Mar 2018 04:42:45 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Thu, 29 Mar 2018 04:42:44 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Thu, 29 Mar 2018 04:42:44 -0500 Received: from [172.24.190.233] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2T9ggvH014754; Thu, 29 Mar 2018 04:42:42 -0500 Subject: Re: [PATCH v5 05/12] PCI: endpoint: Setting a BAR size > 4 GB is invalid if 64-bit flag is not set To: Niklas Cassel , , Lorenzo Pieralisi , Bjorn Helgaas References: <20180328115018.31921-1-niklas.cassel@axis.com> <20180328115018.31921-6-niklas.cassel@axis.com> CC: Niklas Cassel , , From: Kishon Vijay Abraham I Message-ID: <71061f04-ab50-10d5-4e88-dadbe8fdbc5c@ti.com> Date: Thu, 29 Mar 2018 15:12:41 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20180328115018.31921-6-niklas.cassel@axis.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 28 March 2018 05:20 PM, Niklas Cassel wrote: > Setting a BAR size > 4 GB is invalid if PCI_BASE_ADDRESS_MEM_TYPE_64 > flag is not set. > > This sanity check is done in pci_epc_set_bar(), so that we don't need > to do this sanity check in all epc->ops->set_bar() implementations. > > Signed-off-by: Niklas Cassel Acked-by: Kishon Vijay Abraham I > --- > drivers/pci/endpoint/pci-epc-core.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c > index 40eea20d21f9..8637822605ff 100644 > --- a/drivers/pci/endpoint/pci-epc-core.c > +++ b/drivers/pci/endpoint/pci-epc-core.c > @@ -315,7 +315,9 @@ int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, > (epf_bar->barno == BAR_5 && > flags & PCI_BASE_ADDRESS_MEM_TYPE_64) || > (flags & PCI_BASE_ADDRESS_SPACE_IO && > - flags & PCI_BASE_ADDRESS_IO_MASK)) > + flags & PCI_BASE_ADDRESS_IO_MASK) || > + (upper_32_bits(epf_bar->size) && > + !(flags & PCI_BASE_ADDRESS_MEM_TYPE_64))) > return -EINVAL; > > if (!epc->ops->set_bar) >