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[209.132.180.67]) by mx.google.com with ESMTP id 2si4301231pfk.291.2018.03.29.04.45.15; Thu, 29 Mar 2018 04:45:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753259AbeC2Lm6 (ORCPT + 99 others); Thu, 29 Mar 2018 07:42:58 -0400 Received: from mail.bootlin.com ([62.4.15.54]:37984 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753021AbeC2Lm4 (ORCPT ); Thu, 29 Mar 2018 07:42:56 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 9219120721; Thu, 29 Mar 2018 13:42:55 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (242.171.71.37.rev.sfr.net [37.71.171.242]) by mail.bootlin.com (Postfix) with ESMTPSA id 6B046206FB; Thu, 29 Mar 2018 13:42:55 +0200 (CEST) Date: Thu, 29 Mar 2018 13:42:55 +0200 From: Alexandre Belloni To: Alexander Dahl Cc: linux-arm-kernel@lists.infradead.org, Boris Brezillon , Thomas Gleixner , Daniel Lezcano , linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 0/6] clocksource: rework Atmel TCB timer driver Message-ID: <20180329114255.GL13942@piout.net> References: <20180223171558.7037-1-alexandre.belloni@bootlin.com> <3478710.yJBBt3uoRT@ada> <20180329104542.GK13942@piout.net> <3103570.fW0XyqvKVi@ada> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3103570.fW0XyqvKVi@ada> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 29/03/2018 at 13:31:18 +0200, Alexander Dahl wrote: > Pretty sure. I rebuilt the whole BSP and added another line to the kernel > source to see if the tree I applied the patches to, was actually built: > > > diff --git a/drivers/clocksource/timer-atmel-tcb.c b/drivers/clocksource/timer-atmel-tcb.c > index 7fde9cfbf203..f85affc74a86 100644 > --- a/drivers/clocksource/timer-atmel-tcb.c > +++ b/drivers/clocksource/timer-atmel-tcb.c > @@ -222,7 +222,8 @@ static int __init tc_clkevt_register(struct device_node *node, > goto err_slow; > clk_disable(tce.clk); > > - clockevents_config_and_register(&tce.clkevt, 32768, 1, bits - 1); > + pr_info( "*** bits: 0x%x, BIT(bits): 0x%lx\n", bits, BIT(bits) ); > + clockevents_config_and_register(&tce.clkevt, 32768, 1, BIT(bits) - 1); > > ret = request_irq(tce.irq, tc_clkevt2_irq, IRQF_TIMER | IRQF_SHARED, > tce.clkevt.name, &tce); > > I've just tested on a g20, old driver: INT NAME RATE MAX 16 [vel at91_tick,] 175 Ints/s (max: 231) 19 [ vel tc_clkevt] 129 Ints/s (max: 129) new driver: INT NAME RATE MAX 17 [vel timer@fffa] 129 Ints/s (max: 129) 18 [ vel ttyS0] 175 Ints/s (max: 231) -- Alexandre Belloni, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com