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[209.132.180.67]) by mx.google.com with ESMTP id x190si3937568pgd.52.2018.03.29.05.51.22; Thu, 29 Mar 2018 05:51:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752710AbeC2MuJ (ORCPT + 99 others); Thu, 29 Mar 2018 08:50:09 -0400 Received: from mga04.intel.com ([192.55.52.120]:19369 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751903AbeC2MuH (ORCPT ); Thu, 29 Mar 2018 08:50:07 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Mar 2018 05:50:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,376,1517904000"; d="scan'208";a="37864000" Received: from ahunter-desktop.fi.intel.com (HELO [10.237.72.168]) ([10.237.72.168]) by FMSMGA003.fm.intel.com with ESMTP; 29 Mar 2018 05:50:05 -0700 Subject: Re: [PATCH v2] mmc: sdhci-of-arasan: Add quirk to avoid unexpected interrupt msgs To: Phil Edworthy , Shawn Lin , Ulf Hansson Cc: Michal Simek , linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Michel Pollet References: <1520951200-24703-1-git-send-email-phil.edworthy@renesas.com> From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Message-ID: <4b50ca51-117e-cab2-7459-d6c9727ca07c@intel.com> Date: Thu, 29 Mar 2018 15:49:12 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <1520951200-24703-1-git-send-email-phil.edworthy@renesas.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/03/18 16:26, Phil Edworthy wrote: > On SD 2.00 cards we get lots of these messages: > "mmc0: Got data interrupt 0x00000002 even though no data operation was in progress" > By applying the SDHCI_QUIRK2_STOP_WITH_TC quirk, the messages no longer happen. > > A single card claiming to be SD 3.00 compliant also generates the interrupts, > but since the card's manfacturing date is 2002 mar, it's unlikely to really be > SD 3.00. This card is a 8GB SanDisk 'SU08G' 8.0 (SDHC class 4). > > This has been reported on Xilinx devices that also use the Arasan IP. > See https://patchwork.kernel.org/patch/8062871/ > > This has been tested on the Renesas RZ/ND-DB board with the RZ/N1 SoC. The > Arasan IP in this device is version 1.39a and uses a max SD clock of 50MHz and > does not support DDR modes. > > Signed-off-by: Phil Edworthy Acked-by: Adrian Hunter > --- > v2: > - Changed commit msg to detail the cards that fail. > - Provided the IP version and further background info. > --- > drivers/mmc/host/sdhci-of-arasan.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c > index c33a5f7..ab66e32 100644 > --- a/drivers/mmc/host/sdhci-of-arasan.c > +++ b/drivers/mmc/host/sdhci-of-arasan.c > @@ -290,7 +290,8 @@ static const struct sdhci_pltfm_data sdhci_arasan_pdata = { > .ops = &sdhci_arasan_ops, > .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, > .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | > - SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, > + SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN | > + SDHCI_QUIRK2_STOP_WITH_TC, > }; > > static u32 sdhci_arasan_cqhci_irq(struct sdhci_host *host, u32 intmask) >