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[209.132.180.67]) by mx.google.com with ESMTP id 22si4602951pgg.390.2018.03.29.14.31.05; Thu, 29 Mar 2018 14:31:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=W/SzdFk8; dkim=pass header.i=@codeaurora.org header.s=default header.b=HtZt8s3B; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752744AbeC2V2g (ORCPT + 99 others); Thu, 29 Mar 2018 17:28:36 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:36872 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752710AbeC2V2e (ORCPT ); Thu, 29 Mar 2018 17:28:34 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 4A19361150; Thu, 29 Mar 2018 21:28:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522358913; bh=hwHqiZpSi2e/IHCeSLzGh9UrM51d59vBiCc04DO7gFE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W/SzdFk8q4s2cyEHhF69tzhPx4PNKG/13C5crLI//FVRm3lKEH9Z3awtcWe6VIuf5 rumifqusdJWm80cs5c8UbfHovwi1bbL9fKwzXyU6w7M94bMKwDI2p1SAyKaRlToEqG ap7T8BV+DuwVzjo8DNjUf55TNAqQKafuhCRNi4BA= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from lx-ilial.mea.qualcomm.com (unknown [185.23.60.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilialin@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E24A76028D; Thu, 29 Mar 2018 21:28:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522358902; bh=hwHqiZpSi2e/IHCeSLzGh9UrM51d59vBiCc04DO7gFE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HtZt8s3Bop/Q3T+HPLXKrvq92co08e58SsDj2KaH0lgBkEQoslZHoPvHc/m/GV+rk /vSZAQ0sOkQos6qf3t2BKVQ2pj5Csz6o1oMkAGOEnV7NEDQRHH/rEQsaOwMbKeiggU t1oAoUudk092KpNCJBqZy3lVNnlCZucl1vxhLrZo= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E24A76028D Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilialin@codeaurora.org From: Ilia Lin To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, mark.rutland@arm.com, rjw@rjwysocki.net, viresh.kumar@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, andy.gross@linaro.org, david.brown@linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: rnayak@codeaurora.org, ilialin@codeaurora.org, amit.kucheria@linaro.org, nicolas.dechesne@linaro.org, celster@codeaurora.org, tfinkel@codeaurora.org Subject: [PATCH v4 14/14] dt: qcom: Add qcom-cpufreq-kryo driver configuration Date: Fri, 30 Mar 2018 00:26:47 +0300 Message-Id: <1522358807-10413-15-git-send-email-ilialin@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1522358807-10413-1-git-send-email-ilialin@codeaurora.org> References: <1522358807-10413-1-git-send-email-ilialin@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Ilia Lin --- arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 2 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 310 +++++++++++++++++++++++++++- 2 files changed, 309 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts b/arch/arm64/boot/dts/qcom/apq8096-db820c.dts index 230e9c8..da23bda 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dts @@ -17,5 +17,5 @@ / { model = "Qualcomm Technologies, Inc. DB820c"; - compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc"; + compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc", "qcom,apq8096"; }; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 993f0a3..594a183 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -183,218 +183,519 @@ }; cluster0_opp: opp_table0 { - compatible = "operating-points-v2"; + compatible = "operating-points-v2-kryo-cpu"; + nvmem-cells = <&speedbin_efuse>; opp-shared; opp-307200000 { opp-hz = /bits/ 64 < 307200000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x77>; + clock-latency-ns = <200000>; + }; + opp-384000000 { + opp-hz = /bits/ 64 < 384000000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-422400000 { opp-hz = /bits/ 64 < 422400000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-460800000 { + opp-hz = /bits/ 64 < 460800000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-480000000 { opp-hz = /bits/ 64 < 480000000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-537600000 { + opp-hz = /bits/ 64 < 537600000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-556800000 { opp-hz = /bits/ 64 < 556800000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-614400000 { + opp-hz = /bits/ 64 < 614400000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-652800000 { opp-hz = /bits/ 64 < 652800000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-691200000 { + opp-hz = /bits/ 64 < 691200000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-729600000 { opp-hz = /bits/ 64 < 729600000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-768000000 { + opp-hz = /bits/ 64 < 768000000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-844800000 { opp-hz = /bits/ 64 < 844800000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x77>; + clock-latency-ns = <200000>; + }; + opp-902400000 { + opp-hz = /bits/ 64 < 902400000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-960000000 { opp-hz = /bits/ 64 < 960000000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-979200000 { + opp-hz = /bits/ 64 < 979200000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1036800000 { opp-hz = /bits/ 64 < 1036800000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1056000000 { + opp-hz = /bits/ 64 < 1056000000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1113600000 { opp-hz = /bits/ 64 < 1113600000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1132800000 { + opp-hz = /bits/ 64 < 1132800000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1190400000 { opp-hz = /bits/ 64 < 1190400000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1209600000 { + opp-hz = /bits/ 64 < 1209600000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1228800000 { opp-hz = /bits/ 64 < 1228800000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1286400000 { + opp-hz = /bits/ 64 < 1286400000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1324800000 { opp-hz = /bits/ 64 < 1324800000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x5>; + clock-latency-ns = <200000>; + }; + opp-1363200000 { + opp-hz = /bits/ 64 < 1363200000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x72>; clock-latency-ns = <200000>; }; opp-1401600000 { opp-hz = /bits/ 64 < 1401600000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x5>; + clock-latency-ns = <200000>; + }; + opp-1440000000 { + opp-hz = /bits/ 64 < 1440000000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1478400000 { opp-hz = /bits/ 64 < 1478400000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x1>; + clock-latency-ns = <200000>; + }; + opp-1497600000 { + opp-hz = /bits/ 64 < 1497600000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x4>; + clock-latency-ns = <200000>; + }; + opp-1516800000 { + opp-hz = /bits/ 64 < 1516800000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1593600000 { opp-hz = /bits/ 64 < 1593600000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x71>; + clock-latency-ns = <200000>; + }; + opp-1996800000 { + opp-hz = /bits/ 64 < 1996800000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x20>; + clock-latency-ns = <200000>; + }; + opp-2188800000 { + opp-hz = /bits/ 64 < 2188800000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x10>; clock-latency-ns = <200000>; }; }; cluster1_opp: opp_table1 { - compatible = "operating-points-v2"; + compatible = "operating-points-v2-kryo-cpu"; + nvmem-cells = <&speedbin_efuse>; opp-shared; opp-307200000 { opp-hz = /bits/ 64 < 307200000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x77>; + clock-latency-ns = <200000>; + }; + opp-384000000 { + opp-hz = /bits/ 64 < 384000000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-403200000 { opp-hz = /bits/ 64 < 403200000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-460800000 { + opp-hz = /bits/ 64 < 460800000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-480000000 { opp-hz = /bits/ 64 < 480000000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-537600000 { + opp-hz = /bits/ 64 < 537600000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-556800000 { opp-hz = /bits/ 64 < 556800000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-614400000 { + opp-hz = /bits/ 64 < 614400000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-652800000 { opp-hz = /bits/ 64 < 652800000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-691200000 { + opp-hz = /bits/ 64 < 691200000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-729600000 { opp-hz = /bits/ 64 < 729600000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-748800000 { + opp-hz = /bits/ 64 < 748800000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-806400000 { opp-hz = /bits/ 64 < 806400000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-825600000 { + opp-hz = /bits/ 64 < 825600000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-883200000 { opp-hz = /bits/ 64 < 883200000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-902400000 { + opp-hz = /bits/ 64 < 902400000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-940800000 { opp-hz = /bits/ 64 < 940800000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-979200000 { + opp-hz = /bits/ 64 < 979200000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1036800000 { opp-hz = /bits/ 64 < 1036800000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1056000000 { + opp-hz = /bits/ 64 < 1056000000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1113600000 { opp-hz = /bits/ 64 < 1113600000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1132800000 { + opp-hz = /bits/ 64 < 1132800000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1190400000 { opp-hz = /bits/ 64 < 1190400000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1209600000 { + opp-hz = /bits/ 64 < 1209600000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1248000000 { opp-hz = /bits/ 64 < 1248000000 >; opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1286400000 { + opp-hz = /bits/ 64 < 1286400000 >; + opp-microvolt = <905000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1324800000 { opp-hz = /bits/ 64 < 1324800000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1363200000 { + opp-hz = /bits/ 64 < 1363200000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1401600000 { opp-hz = /bits/ 64 < 1401600000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1440000000 { + opp-hz = /bits/ 64 < 1440000000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1478400000 { opp-hz = /bits/ 64 < 1478400000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1516800000 { + opp-hz = /bits/ 64 < 1516800000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1555200000 { opp-hz = /bits/ 64 < 1555200000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1593600000 { + opp-hz = /bits/ 64 < 1593600000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1632000000 { opp-hz = /bits/ 64 < 1632000000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1670400000 { + opp-hz = /bits/ 64 < 1670400000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1708800000 { opp-hz = /bits/ 64 < 1708800000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1747200000 { + opp-hz = /bits/ 64 < 1747200000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x70>; clock-latency-ns = <200000>; }; opp-1785600000 { opp-hz = /bits/ 64 < 1785600000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <200000>; + }; + opp-1804800000 { + opp-hz = /bits/ 64 < 1804800000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x6>; clock-latency-ns = <200000>; }; opp-1824000000 { opp-hz = /bits/ 64 < 1824000000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x71>; + clock-latency-ns = <200000>; + }; + opp-1900800000 { + opp-hz = /bits/ 64 < 1900800000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x74>; clock-latency-ns = <200000>; }; opp-1920000000 { opp-hz = /bits/ 64 < 1920000000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x1>; + clock-latency-ns = <200000>; + }; + opp-1977600000 { + opp-hz = /bits/ 64 < 1977600000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x30>; clock-latency-ns = <200000>; }; opp-1996800000 { opp-hz = /bits/ 64 < 1996800000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x1>; + clock-latency-ns = <200000>; + }; + opp-2054400000 { + opp-hz = /bits/ 64 < 2054400000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x30>; clock-latency-ns = <200000>; }; opp-2073600000 { opp-hz = /bits/ 64 < 2073600000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x1>; clock-latency-ns = <200000>; }; opp-2150400000 { opp-hz = /bits/ 64 < 2150400000 >; opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x31>; + clock-latency-ns = <200000>; + }; + opp-2246400000 { + opp-hz = /bits/ 64 < 2246400000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x10>; + clock-latency-ns = <200000>; + }; + opp-2342400000 { + opp-hz = /bits/ 64 < 2342400000 >; + opp-microvolt = <1140000 905000 1140000>; + opp-supported-hw = <0x10>; clock-latency-ns = <200000>; }; }; @@ -992,6 +1293,11 @@ reg = <0x24f 0x1>; bits = <1 4>; }; + + speedbin_efuse: speedbin@133 { + reg = <0x133 0x1>; + bits = <5 3>; + }; }; phy@34000 { -- 1.9.1