Received: by 10.213.65.68 with SMTP id h4csp152016imn; Fri, 30 Mar 2018 02:56:22 -0700 (PDT) X-Google-Smtp-Source: AIpwx48e06DircGAemKVLye0ZVdyYreZ1hJQbavXUG2S25hQdV6IhRj+8ZQ18gye7ncHvUvHYfwN X-Received: by 10.99.170.70 with SMTP id x6mr8089230pgo.114.1522403782190; Fri, 30 Mar 2018 02:56:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522403782; cv=none; d=google.com; s=arc-20160816; b=kWWlcH56ptthaqrTxvCkZ+tW58dq3JIt9N92Ip9K9/AdxoOQuxEmTNe4h9smWeWc1m y/yf/wkNiXGlSrpL8++R2nQuOMFESbSizlheQS6U8Cz9NBxSnodpmAuJqShTm7G+wdCf fWoJHYEZmAvRLtN1Fjg1oR/pIbJpHzwrpnU5dS3m4fZJxCP+AjIUVwsDq0ZV9pkPilOE eXH9PtgPworeBlZ88IdSuvLQNgHblLh8BByGUmAsh51eBhcYo020kBb5w7kOC1E55dVc IKNmqyYEMxrSneYf5hceAQultNQShQhoQ9MeGOXj++ovpQs+hRBB0NkoHSB/tRyAtQvw 5Xaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=JPutOovfWVRut8+HrVdY80F8EDl1Epdl5+TzueYllLc=; b=BQhyPzXNXOtmMYfqihpyEysCIsY9sIgse/W6tK0JGTxERw4JhNlGtop+khTzPcVaXm 5ZiSJG7vI/lfnjXeqg/kTsPiMFj8wT+qSKv4O1m0qVSO2cPZUFyoLwmX4Z1fAzwU80fO XZj2tUSgN0YOS3TGtujBIOZLQSWezcArDIdKEp127inxOhRPAPrzjRXGg2U4oVw1csRu 9TtP0ywGRnHD4ntaWqntmQrqxHtatFHdBifiPhMmlhnm4YP0BkZ9Emx/TTYSW78dGMEH 7FkC/nZWKzlOJ1/ljoTIu1TPXbTKU8xigIPdFvPn4+Ba3sPOHzFt836ENEWa2g9owPkq wGhA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f19-v6si7892629plr.411.2018.03.30.02.56.08; Fri, 30 Mar 2018 02:56:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751878AbeC3Jyq (ORCPT + 99 others); Fri, 30 Mar 2018 05:54:46 -0400 Received: from zxshcas2.zhaoxin.com ([180.169.121.92]:58748 "EHLO ZXSHCAS2.zhaoxin.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751096AbeC3Jyn (ORCPT ); Fri, 30 Mar 2018 05:54:43 -0400 Received: from zxbjmbx3.zhaoxin.com (10.29.252.165) by ZXSHCAS2.zhaoxin.com (10.28.252.162) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Fri, 30 Mar 2018 17:54:41 +0800 Received: from timguo-System-Product-Name.zhaoxin.com (10.29.8.54) by zxbjmbx3.zhaoxin.com (10.29.252.165) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Fri, 30 Mar 2018 17:54:39 +0800 From: David Wang To: , , , , , , , CC: , , , , , , David Wang Subject: [PATCH 2/2] x86/mce: add CMCI support for centaur CPUs Date: Fri, 30 Mar 2018 17:53:42 +0800 Message-ID: <1522403622-31146-3-git-send-email-davidwang@zhaoxin.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1522403622-31146-1-git-send-email-davidwang@zhaoxin.com> References: <1522403622-31146-1-git-send-email-davidwang@zhaoxin.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.29.8.54] X-ClientProxiedBy: zxbjmbx1.zhaoxin.com (10.29.252.163) To zxbjmbx3.zhaoxin.com (10.29.252.165) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch is used to tell the kernel that centaur CPUs support CMCI mechanism which is compatible with INTEL CMCI. Signed-off-by: David Wang --- arch/x86/kernel/cpu/mcheck/mce.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 82b25e1..62aa85c 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -1751,6 +1751,7 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c) { switch (c->x86_vendor) { case X86_VENDOR_INTEL: + case X86_VENDOR_CENTAUR: mce_intel_feature_init(c); mce_adjust_timer = cmci_intel_adjust_timer; break; -- 1.9.1