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[209.132.180.67]) by mx.google.com with ESMTP id i16si5635224pgv.255.2018.03.30.08.31.01; Fri, 30 Mar 2018 08:31:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=DuRubhNL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752297AbeC3P3N (ORCPT + 99 others); Fri, 30 Mar 2018 11:29:13 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:40502 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751418AbeC3P3G (ORCPT ); Fri, 30 Mar 2018 11:29:06 -0400 Received: by mail-wm0-f68.google.com with SMTP id x4so17218832wmh.5 for ; Fri, 30 Mar 2018 08:29:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=I8pGhEjfAxAfF2CZaXKXR4H2MjLvLZ4lynYaksKe5YI=; b=DuRubhNLZg6r4W3N99lNgtEch5xixnDwe3juqCf66qH2B2E1KO/1AqwHQYtNwOZ7Lp Av9pVJBsWjDUM1cO+09HlqwwTwVXkG657izUgNtV756OgkU2/fJpPaZ2g5OOopyx4TxT XyKhiCAVVXNtp4ncpkhGpXGOpcb9YQQlY3IduvX/ooeBSWq4xOk+uyNTO3kr6MwU5m2y +SgPxPRIudJ8RQqrvwlgVCWeuYTF8DsezgUalrU5aICIlNK/aTm3+Qk0849Y2iLuKEY+ mD/Jjilc5n2RfGA1atL/FrL3iVezql6pAYnc8215BkC6cnw8VpZ+o26GSvlJHcNav5nG 8dgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=I8pGhEjfAxAfF2CZaXKXR4H2MjLvLZ4lynYaksKe5YI=; b=AUVRTi60nBpXSvl0HmPp7ApUZvKeo8GkFXTzFAI2/ev5w+qIn54rdd9qHlsWn0UzlV 8MBCPBir0xIDUkPaRf6DBjQ6njVzXBYTsXpH51oVp6dOqkoQ7+cRTcEKLVgBrVMOXlJH Ph/OK2PonDpvhShFGGgRm3TppuFd1VlvhD0DzZFZFm6IlSZ6rBVR7Hc1Iz0H0qMLVIQg CoSUJqKa+E5LnEhHM0fwsypWgsWXUS9ZBWUrbM+HWaIKaxN4Yq9UGo9P868FE7W7ZmoV fZ8CGDjG43LQbkogEn6dgySMei7XEqg4cm7XaL5KS4ZHDlOU5W9Kj/41JDkVH0rkIG+N esMQ== X-Gm-Message-State: AElRT7FlLboD+8mFMVEdlcDWleY6O2XqpJijrWf6gZgOWQEMwOkY2k7Q AuQT+egaRtQQE2XTmRcghtEHJiV/RHo= X-Received: by 10.28.177.215 with SMTP id a206mr2567249wmf.142.1522423745689; Fri, 30 Mar 2018 08:29:05 -0700 (PDT) Received: from brgl-bgdev.baylibre.local ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id n49sm14429881wrn.90.2018.03.30.08.29.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 30 Mar 2018 08:29:05 -0700 (PDT) From: Bartosz Golaszewski To: Sekhar Nori , Kevin Hilman , Rob Herring , Mark Rutland , Russell King , David Lechner , Michael Turquette , Stephen Boyd , Ohad Ben-Cohen , Bjorn Andersson , Philipp Zabel Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-remoteproc@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v5 4/8] remoteproc/davinci: add the missing retval check for clk_enable() Date: Fri, 30 Mar 2018 17:28:52 +0200 Message-Id: <20180330152856.12297-5-brgl@bgdev.pl> X-Mailer: git-send-email 2.16.3 In-Reply-To: <20180330152856.12297-1-brgl@bgdev.pl> References: <20180330152856.12297-1-brgl@bgdev.pl> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski The davinci platform is being switched to using the common clock framework, where clk_enable() can fail. Add the return value check. Signed-off-by: Bartosz Golaszewski Acked-by: Suman Anna --- drivers/remoteproc/da8xx_remoteproc.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/da8xx_remoteproc.c b/drivers/remoteproc/da8xx_remoteproc.c index bf3b9034c319..2b24291337b7 100644 --- a/drivers/remoteproc/da8xx_remoteproc.c +++ b/drivers/remoteproc/da8xx_remoteproc.c @@ -138,6 +138,7 @@ static int da8xx_rproc_start(struct rproc *rproc) struct device *dev = rproc->dev.parent; struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; struct clk *dsp_clk = drproc->dsp_clk; + int ret; /* hw requires the start (boot) address be on 1KB boundary */ if (rproc->bootaddr & 0x3ff) { @@ -148,7 +149,12 @@ static int da8xx_rproc_start(struct rproc *rproc) writel(rproc->bootaddr, drproc->bootreg); - clk_enable(dsp_clk); + ret = clk_enable(dsp_clk); + if (ret) { + dev_err(dev, "clk_enable() failed: %d\n", ret); + return ret; + } + davinci_clk_reset_deassert(dsp_clk); return 0; -- 2.16.3