Received: by 10.213.65.68 with SMTP id h4csp1962101imn; Sun, 1 Apr 2018 20:35:49 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+KNDXewkKdcFbAItvxEwbrtHsoBb2bkw/ScnroLRu3tgotRltO7WtYWJ236KFePrRVzTO+ X-Received: by 10.101.93.2 with SMTP id e2mr5226908pgr.100.1522640149547; Sun, 01 Apr 2018 20:35:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522640149; cv=none; d=google.com; s=arc-20160816; b=zGhjhuHE6od6Xr0WjOkx4Z79776Ws2Qlg7akHdrda9wV4bi/ym1kIgYNSdIgsuFzJN kN/uTQuH46SsGS8pZqpDUPy8GdC7fmSuar+lWgGlUEiN6CdzP329cBqI9c6RtK1NalWA Im+QtlHiV7T81Nq4v0yir/SE6uash9ic9Dxjx9NEHFJC/mZyCzsDLX9TL+gTRjNlzpzQ /6NC9J4Ev6K+Gy4NSTBWKJzx6pCV/5ptBIU1RG1FeLPHHcn26iDF71skRvwKmBhWtfaF JgqB6vhgKJHxUFy1Q01y/ovNzBjKqqPXSJIt3Yg9NVWxJPE/gJL+vElrE00xmCKVYB4D 0xsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=7oC95wqg4OMug3rY9r8aLSRtsyI3p2HnKyqDlAxphec=; b=zfIzKTLwnZRicqMqk+imXg0pnIognBBZF3oYm/wsLptgGDtKemmjVvPRSGXIDYcwG3 LD785oq+rSlO9dcR5VlDSKEuO6H3ulH5lIi9BxkIdkm3c7l6Ii+DhpZHYeO/A8NJ91my DeKkRPXtwMCZ+Bn4qiqjfb0Q3UFu61ETV3c/H58pHvDu+fskR8kMnGK2v4Op31isq9xM crY7nTIuvaAGjQOi1iC7O12k/QQSXlUb6sXEdlbvF8iUM2yuq+5R0SvY8ugBuFts9W8s x0fSCSLF6G/uYk0X23WAlPC/+QBbVGV3wFeUa237yDQELNSZSiQbk0sfsjD6Js1tFmVx NQXw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t18-v6si13447161plo.190.2018.04.01.20.35.35; Sun, 01 Apr 2018 20:35:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754173AbeDBDeP (ORCPT + 99 others); Sun, 1 Apr 2018 23:34:15 -0400 Received: from zxshcas1.zhaoxin.com ([180.169.121.91]:33934 "EHLO ZXSHCAS1.zhaoxin.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754048AbeDBDeL (ORCPT ); Sun, 1 Apr 2018 23:34:11 -0400 Received: from zxbjmbx3.zhaoxin.com (10.29.252.165) by ZXSHCAS1.zhaoxin.com (10.28.252.161) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Mon, 2 Apr 2018 11:34:09 +0800 Received: from timguo-System-Product-Name.zhaoxin.com (10.29.8.54) by zxbjmbx3.zhaoxin.com (10.29.252.165) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Mon, 2 Apr 2018 11:34:07 +0800 From: David Wang To: , , , , , , , CC: , , , , , , David Wang Subject: [PATCH v2 2/2] x86/mce: add CMCI support for centaur CPUs Date: Mon, 2 Apr 2018 11:33:52 +0800 Message-ID: <1522640032-3357-3-git-send-email-davidwang@zhaoxin.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1522640032-3357-1-git-send-email-davidwang@zhaoxin.com> References: <1522640032-3357-1-git-send-email-davidwang@zhaoxin.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.29.8.54] X-ClientProxiedBy: zxbjmbx1.zhaoxin.com (10.29.252.163) To zxbjmbx3.zhaoxin.com (10.29.252.165) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch is used to tell the kernel that newer Centaur CPU support CMCI. Signed-off-by: David Wang --- arch/x86/kernel/cpu/mcheck/mce.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index c3db7ce..361d95e 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -1751,6 +1751,7 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c) { switch (c->x86_vendor) { case X86_VENDOR_INTEL: + case X86_VENDOR_CENTAUR: mce_intel_feature_init(c); mce_adjust_timer = cmci_intel_adjust_timer; break; -- 1.9.1