Received: by 10.213.65.68 with SMTP id h4csp2313758imn; Mon, 2 Apr 2018 05:24:52 -0700 (PDT) X-Google-Smtp-Source: AIpwx49nLgbmGNCvU0tttntMs6upCoOV/7r9YnnpOaFuFWkggsnnItHoPKFytx9fLbo6+SZ2D9Qt X-Received: by 10.98.68.86 with SMTP id r83mr7282581pfa.145.1522671892380; Mon, 02 Apr 2018 05:24:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522671892; cv=none; d=google.com; s=arc-20160816; b=fCElfE0X6KLX3FqWepSFtUtiLJ5Ld8wX2XGfrR3aih63YCW2b1bhOuVP5PEDPDpyrG LKd85t7HydUvjoVV94iCD84y+WUiIrooOhZWZOsdyJzQKhAMEyeukRto3O8P043Ur2EU 4Z6ODdw4G82d9LP60clTQutu2f9Xk3RzFh1CgQqeq0gPxcIOOAftIMcykMPiPKVI+sEt SamlLXPWfDrU6hXhM/y9xbZTcCtcnzkf0ExWYUbCgrL+fINyZZVKgV21g/thl+qnuUix b6doq0LoFC+Tvw08TvZ/jlXqGSHSBtk30V3x9rjCdnyEHoays6fB8+TQxQ+WTWw3EUnQ F3PQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:subject:cc:to:from:date :arc-authentication-results; bh=AXKArr0jaOUgNqoqMCHNCfKSfsux+HR70BiLFhOnfAI=; b=PWJkx4ByDcT8ucIqmCyZi7KH1FuCdW/stbH5nqEPUJ+TxQFD15B337rnjUy7L1+kzP Fq1e40w6s6zeqHbAXR6tisFY3idPYBShdiD1tyCL/EcuDNp5UYogXYMC7E9LmdO74C3u Q+udT5JcYZzjZpBiQ+Moa5rCz6gp8Xx4fRrgPUNU/Z/ZmtyhBZ5JlSsacw2j8OZqtsqe Tdk+v8JrMljJ4tHL38grlAPHxTYOTtVoWDMYoUkVXKwrRDuY0I8AP/YhfNtTUe/WgA87 j0M/oGQzfyy8AZUGa4lhdjFBe9RCSJjiVn5SozQutxD0dM5TNnkE5w5A/s+tNw/jaASG 0CJA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x9-v6si250873plo.41.2018.04.02.05.24.38; Mon, 02 Apr 2018 05:24:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752090AbeDBMWx (ORCPT + 99 others); Mon, 2 Apr 2018 08:22:53 -0400 Received: from mail.bootlin.com ([62.4.15.54]:47392 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751239AbeDBMWw (ORCPT ); Mon, 2 Apr 2018 08:22:52 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id D56E420764; Mon, 2 Apr 2018 14:22:50 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon (91-160-177-164.subs.proxad.net [91.160.177.164]) by mail.bootlin.com (Postfix) with ESMTPSA id 8AAE320384; Mon, 2 Apr 2018 14:22:50 +0200 (CEST) Date: Mon, 2 Apr 2018 14:22:49 +0200 From: Boris Brezillon To: Peter Rosin Cc: Alexandre Belloni , Josh Wu , Cyrille Pitchen , linux-kernel@vger.kernel.org, Nicolas Ferre , Marek Vasut , linux-mtd@lists.infradead.org, Richard Weinberger , Brian Norris , David Woodhouse , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Message-ID: <20180402142249.7e076a64@bbrezillon> In-Reply-To: References: <20180329131054.22506-1-peda@axentia.se> <20180329153322.5e2fc1e7@bbrezillon> <20180329154416.5c1a0013@bbrezillon> X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 29 Mar 2018 16:27:12 +0200 Peter Rosin wrote: > On 2018-03-29 15:44, Boris Brezillon wrote: > > On Thu, 29 Mar 2018 15:37:43 +0200 > > Peter Rosin wrote: > > > >> On 2018-03-29 15:33, Boris Brezillon wrote: > >>> On Thu, 29 Mar 2018 15:10:54 +0200 > >>> Peter Rosin wrote: > >>> > >>>> On a sama5d31 with a Full-HD dual LVDS panel (132MHz pixel clock) NAND > >>>> flash accesses have a tendency to cause display disturbances. Add a > >>>> module param to disable DMA from the NAND controller, since that fixes > >>>> the display problem for me. > >>>> > >>>> Signed-off-by: Peter Rosin > >>>> --- > >>>> drivers/mtd/nand/raw/atmel/nand-controller.c | 7 ++++++- > >>>> 1 file changed, 6 insertions(+), 1 deletion(-) > >>>> > >>>> diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c > >>>> index b2f00b398490..2ff7a77c7b8e 100644 > >>>> --- a/drivers/mtd/nand/raw/atmel/nand-controller.c > >>>> +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c > >>>> @@ -129,6 +129,11 @@ > >>>> #define DEFAULT_TIMEOUT_MS 1000 > >>>> #define MIN_DMA_LEN 128 > >>>> > >>>> +static bool atmel_nand_avoid_dma __read_mostly; > >>>> + > >>>> +MODULE_PARM_DESC(avoiddma, "Avoid using DMA"); > >>>> +module_param_named(avoiddma, atmel_nand_avoid_dma, bool, 0400); > >>> > >>> I'm not a big fan of those driver specific cmdline parameters. Can't we > >>> instead give an higher priority to HLCDC master using the bus matrix? > >> > >> I don't know if it will be enough, but we sure can try. However, I have > >> no idea how to do that. I will happily test stuff though... > > > > There's no interface to configure that from Linux, but you can try to > > tweak it with devmem and if that does the trick, maybe we can expose a > > way to configure that from Linux. For more details, see the "Bus Matrix > > (MATRIX)" section in Atmel datasheets. > > I don't seem to succeed in changing the registers I think I need to change. > I can poke the "Write Protection Mode Register" by writing MAT0 and MAT1 to > it. You mean 0x4D415400, right? ("MAT0" != 0x4D415400). > But when I try to write to "Priority Registers B For Slaves" it doesn't > take, regardless of write protect mode. Did you check MATRIX_WPSR after writing to MATRIX_PRXSY? > > Can the relevant bits only be written when the HLCDC is inactive or > something? I don't know, but maybe Nicolas does. -- Boris Brezillon, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com