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[209.132.180.67]) by mx.google.com with ESMTP id l27si1475514pfi.365.2018.04.02.21.24.55; Mon, 02 Apr 2018 21:25:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BpNxD28e; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752917AbeDCEXs (ORCPT + 99 others); Tue, 3 Apr 2018 00:23:48 -0400 Received: from mail-pl0-f68.google.com ([209.85.160.68]:38931 "EHLO mail-pl0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750814AbeDCEXp (ORCPT ); Tue, 3 Apr 2018 00:23:45 -0400 Received: by mail-pl0-f68.google.com with SMTP id s24-v6so7211113plq.6 for ; Mon, 02 Apr 2018 21:23:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=shNSZmS90IuD3MjUtUv/wf+puSJLfOjuC28RkPPoR1k=; b=BpNxD28eNN4Tt9CbXf4XfWTQBLzbkV2Exc7XVMYkcXb48dH9GlyQO6oODOub2H1y/4 gF8yJikEi6Z1B6CHX8c366I6lsdVcQRav+86gtN+3doyrtbtm/oySPkSFIw+uIdPNSqn qj2c6C35WKEK2D7Tc2cSVUxgtzJJFKQQSlaWE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=shNSZmS90IuD3MjUtUv/wf+puSJLfOjuC28RkPPoR1k=; b=OeLZRt4GgWLP4F2f+EbhH7jAKi/KZntj0t8M1mcUNO3Zr2cWXaFTHKdPKOejqkBKFo 0RWQbWv8AyALfkwB5JRUQOTDuokwRDSxWE4CbJiYV7q6xFI7nZ/ytOHpVaNplr9dmDGI LpgpsG9fyUnZKnMjE7t1QI4xzdXd9B0k4nwaWWqmq1tSXE6oJMJ6aMN9kd8QhCfc9+W+ qOT1bUJKoxHfqJWFem38GT5oUb4SAgyE+wanHonuCMTGJTvlYP9JPb1OBOgRPeP7EYvD Iyp5ooyGvRdloIXWXXvDts6hW7yiE2zpCQL1z30H+qjKwFkHRP+h4J5wF11Fb+7wIU45 +WBg== X-Gm-Message-State: AElRT7G27eRPxkUSRq+FTCP/DWM/azmAQQS6aVOeJG+1el5hmWH/oe7K CxLf+I6Ml0f8o0V15wwVqmN0uQ== X-Received: by 2002:a17:902:585e:: with SMTP id f30-v6mr10944929plj.254.1522729425467; Mon, 02 Apr 2018 21:23:45 -0700 (PDT) Received: from localhost ([122.171.228.188]) by smtp.gmail.com with ESMTPSA id b5sm3130708pfc.87.2018.04.02.21.23.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 02 Apr 2018 21:23:44 -0700 (PDT) Date: Tue, 3 Apr 2018 09:53:41 +0530 From: Viresh Kumar To: Sricharan R Cc: Ilia Lin , mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, mark.rutland@arm.com, rjw@rjwysocki.net, lgirdwood@gmail.com, broonie@kernel.org, andy.gross@linaro.org, david.brown@linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rnayak@codeaurora.org, amit.kucheria@linaro.org, nicolas.dechesne@linaro.org, celster@codeaurora.org, tfinkel@codeaurora.org Subject: Re: [PATCH v4 13/14] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu Message-ID: <20180403042341.GI3572@vireshk-i7> References: <1522358807-10413-1-git-send-email-ilialin@codeaurora.org> <1522358807-10413-14-git-send-email-ilialin@codeaurora.org> <20180402093018.GC3572@vireshk-i7> <7ca35b7a-6078-620b-4772-091e53ef6790@codeaurora.org> <06308b25-14ea-8d8b-6f95-f05c101a617b@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <06308b25-14ea-8d8b-6f95-f05c101a617b@codeaurora.org> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03-04-18, 08:11, Sricharan R wrote: > Right, i was adding a similar one for krait cores [1]. There is code common in the > init sequence across both (little). Do you suggest to make them common ? It may make sense as we are talking about one SoC family here :) -- viresh