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[209.132.180.67]) by mx.google.com with ESMTP id a59-v6si2066381plc.370.2018.04.02.22.47.57; Mon, 02 Apr 2018 22:48:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=kmJG5LH3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754855AbeDCFqi (ORCPT + 99 others); Tue, 3 Apr 2018 01:46:38 -0400 Received: from mail-vk0-f49.google.com ([209.85.213.49]:43036 "EHLO mail-vk0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754807AbeDCFqg (ORCPT ); Tue, 3 Apr 2018 01:46:36 -0400 Received: by mail-vk0-f49.google.com with SMTP id v134so9534324vkd.10 for ; Mon, 02 Apr 2018 22:46:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=t3iJNRKkFXWiZrB+mKv15AoGyAf3p5zrXxyEA4RHJHg=; b=kmJG5LH3msAvWJrTPfzO+rv8+o4eecxMLu8uuT7SsggkbtJx2ciiHX98uvg0lPgwsU o83qH0SOUcfSI31qaFgIuV+GYBdxE91G1cj7Cs5tzEMk1cyxzsLyVKs6EDdxRUoCBckH lwk8nuiSwBNmK4lIT5mNGjfEgQDkhC++KiMDfqWk1iiJc0rbQC5StCOpSoMmXD3gKqAp JfQccLkVUJyVgRiBGTbR/SYMlbINgo6kHCBLMriKTz6g4wbSKGRhQUCeh9fNTTWib9zq fN9q1OM8sJ4CWW4RzYCnd64CnGekPg47lJjBmpu/S+eksU+a+KwPnPKey3EqVL8JHGVe jWuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=t3iJNRKkFXWiZrB+mKv15AoGyAf3p5zrXxyEA4RHJHg=; b=RtwlHbh9UtRFwWK12G3mrPIx0sxa28oxri5ZNxy3qc5QS01XPJnBf0rm2Raq/KRLAD YSWFw17eHLoPKcLzo766M6DzKAHWFsuycrO74PsYcMC469F8X5C+CKm/ddM6bA3KTVrS gtlPv3S1kBPhv1F2AyiGT2A+GvXuDPpXPjjxdp+h+V9f5ST0/bgWtHJYTe8GD4XWX3WK h5+qhzKu0RSOWpkxqtsuwkhPyGE7UBfEeS69wu9yuRBVDyR2K2IBK5+PMlPEgtAaG018 7bQVcPZeOSGUWQzCD7++UCe+Gg2R00srDzBELDo9taxso5lk1Vjos9VCussHjtXIvG8I R5kw== X-Gm-Message-State: ALQs6tAvMFhFzqc/3pa6Bb+FpsQ5eigLVFLeeSnwdeXf2Zk2PZO4hFHy piYzQqtMm22MiHl6YsS0qPjzL150NiOo2RchwXk7Wg== X-Received: by 10.31.3.211 with SMTP id f80mr6426149vki.80.1522734395971; Mon, 02 Apr 2018 22:46:35 -0700 (PDT) MIME-Version: 1.0 Received: by 10.176.83.79 with HTTP; Mon, 2 Apr 2018 22:45:55 -0700 (PDT) In-Reply-To: References: <20180402060123.GB12733@app09> From: Greentime Hu Date: Tue, 3 Apr 2018 13:45:55 +0800 Message-ID: Subject: Re: [GIT PULL] Andes(nds32) Port for Linux 4.17 To: Linus Torvalds Cc: Arnd Bergmann , Linux Kernel Mailing List , Greentime Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2018-04-03 0:04 GMT+08:00 Linus Torvalds : > On Sun, Apr 1, 2018 at 11:01 PM, Greentime Hu wrote: >> >> This tag contains the core nds32 Linux port(including interrupt controll= er >> driver and timer driver), which has been through 7 rounds of review on m= ailing >> list. > > Can I get an overview of the nds32 architecture (uses, quirks, reasons > for existing?) to add to the initial merge message? Just an overview, > not some kind of architecture manual thing. > > Yeah, yeah, I can google it myself and write something up, but it's > the kind of information I'd like to see when merging an architecture I > hadn't really ever heard about, and I suspect most others haven't > either. > Hi, Linus: Andes nds32 architecture supports Linux for Andes's N10, D10, N13, N15, D15 processor cores. Based on the patented 16/32-bit AndeStar RISC-like architecture, we designed the configurable AndesCore series of embedded processor families. AndesCores range from highly performance-efficient small-footprint cores for microcontrollers and deeply-embedded applications to 1GHz+ cores running Linux, covering general-purpose N-series cores for a wide range of computing need, DSP-capable D-series cores for digital signal control, instruction-extensible E-series cores for application-specific acceleration, and secure S-series cores for best protection of the most valuable. Our customers together have shipped over 2.5 billion SoC=E2=80=99s with And= es processors embedded (including non-MMU IP cores). It will help our customers to get better Linux support if we are merged into mainline.