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[74.125.82.42]) by smtp.gmail.com with ESMTPSA id d12sm1235276edi.7.2018.04.02.23.45.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 02 Apr 2018 23:45:13 -0700 (PDT) Received: by mail-wm0-f42.google.com with SMTP id i3so8568936wmf.3; Mon, 02 Apr 2018 23:45:13 -0700 (PDT) X-Received: by 10.28.15.78 with SMTP id 75mr2752998wmp.16.1522737913533; Mon, 02 Apr 2018 23:45:13 -0700 (PDT) MIME-Version: 1.0 Received: by 10.223.164.129 with HTTP; Mon, 2 Apr 2018 23:44:52 -0700 (PDT) In-Reply-To: <20180403061836.3926-7-mylene.josserand@bootlin.com> References: <20180403061836.3926-1-mylene.josserand@bootlin.com> <20180403061836.3926-7-mylene.josserand@bootlin.com> From: Chen-Yu Tsai Date: Tue, 3 Apr 2018 14:44:52 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v5 06/13] ARM: dts: sun8i: a83t: Add CCI-400 node To: =?UTF-8?Q?Myl=C3=A8ne_Josserand?= Cc: Russell King , Maxime Ripard , Marc Zyngier , Mark Rutland , Rob Herring , devicetree , LABBE Corentin , quentin.schulz@bootlin.com, Thomas Petazzoni , linux-arm-kernel , linux-kernel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Apr 3, 2018 at 2:18 PM, Mylène Josserand wrote: > Add CCI-400 node and control-port on CPUs needed by SMP bringup. > > Signed-off-by: Mylène Josserand Reviewed-by: Chen-Yu Tsai