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[209.132.180.67]) by mx.google.com with ESMTP id c13si167477pfi.404.2018.04.03.03.31.07; Tue, 03 Apr 2018 03:31:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NNU2po+x; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755317AbeDCK1o (ORCPT + 99 others); Tue, 3 Apr 2018 06:27:44 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:10273 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754937AbeDCK1l (ORCPT ); Tue, 3 Apr 2018 06:27:41 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w33AQbno003990; Tue, 3 Apr 2018 05:26:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1522751197; bh=UPCQw0Vh90F+vE5ZNTNv//QvDMwpBopA1LH8xYzL8qs=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=NNU2po+xZHtuacgDnTYIqNA7s6eI+MEjuUYlaQJGjWpVz/0O5nqtBKpZToMhuU5M1 elLlYtw/DKHebmw4M4FH1Xxw5f2rvhrhdLVN4sYaW6Lek2ApG4v52OmyJ8sV6845J/ vcBkhcwtF5sdLV0DTlXSEKXucIZ9N1Ixcmd2M9II= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w33AQbMW003981; Tue, 3 Apr 2018 05:26:37 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Tue, 3 Apr 2018 05:26:37 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Tue, 3 Apr 2018 05:26:37 -0500 Received: from [172.24.190.172] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w33AQWFd020572; Tue, 3 Apr 2018 05:26:33 -0500 Subject: Re: [PATCH v8 25/42] ARM: davinci: dm644x: add new clock init using common clock framework To: David Lechner , , , CC: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Bartosz Golaszewski , Adam Ford , References: <1521168778-27236-1-git-send-email-david@lechnology.com> <1521168778-27236-26-git-send-email-david@lechnology.com> From: Sekhar Nori Message-ID: <333f49c7-bafd-8e2d-65e9-7d1aff4836de@ti.com> Date: Tue, 3 Apr 2018 15:56:32 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <1521168778-27236-26-git-send-email-david@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday 16 March 2018 08:22 AM, David Lechner wrote: > +static struct resource dm644x_pll1_resources[] = { > + { > + .start = DAVINCI_PLL1_BASE, > + .end = DAVINCI_PLL1_BASE + SZ_4K - 1, The .end should be DAVINCI_PLL1_BASE + SZ_1K - 1, otherwise it prevents PLL2 from getting registered. > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static struct platform_device dm644x_pll1_device = { > + .name = "dm644x-pll1", > + .id = -1, > + .resource = dm644x_pll1_resources, > + .num_resources = ARRAY_SIZE(dm644x_pll1_resources), > +}; > + > +static struct resource dm644x_pll2_resources[] = { > + { > + .start = DAVINCI_PLL2_BASE, > + .end = DAVINCI_PLL2_BASE + SZ_4K - 1, And this too should be fixed, else it prevents the PSC from getting registered. > + .flags = IORESOURCE_MEM, > + }, > +}; With these fixed, I still had to enable 'clk_ignore_unused' on DM644x EVM to get to NFS boot. I think root of the problem is that pm_runtime() APIs are not working in the legacy boot mode. This can be seen even on the DA850 LCDK in legacy boot. pm_genpd_summary in debugfs shows all domains are off and there are no devices registered under the "da850-psc1: emac" domain. NFS mounting still works on the DA850 LCDK because clk_summary shows enable and prepare count of 4 for emac. Not sure how that's happening. But on DM644x EVM, the emac clock enable count is 0. Still looking at whats going wrong here. I am testing your v8 branch with clk-davinci branch from clk-next merged to get the fixes Stephen made. Thanks, Sekhar