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[209.132.180.67]) by mx.google.com with ESMTP id d65si1936065pga.307.2018.04.03.05.45.28; Tue, 03 Apr 2018 05:45:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=PVm3OJmB; dkim=pass header.i=@codeaurora.org header.s=default header.b=PVm3OJmB; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932177AbeDCMoS (ORCPT + 99 others); Tue, 3 Apr 2018 08:44:18 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:56108 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932106AbeDCMoR (ORCPT ); Tue, 3 Apr 2018 08:44:17 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 9E8E06081C; Tue, 3 Apr 2018 12:44:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522759456; bh=zaxnSUlb37JTKNdVXqsCv9R3/805pcIxbNt87SRzb4I=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=PVm3OJmBPrAXrds2L4Qa//IggVVSkiM5KR55gehcTU/ud1LDH1ne5D5tQMDG9KqTW PXX3O9NF5ybAV6q6TrRpZ84Dit3knVUc0M3ja9ZwNMhESGf4jpMbt0A7mLlh+W1LCy LoTnM0vGURUgNkwl3eyf9mVZRq2Y18u6Q9jgoWG8= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from [192.168.0.105] (cpe-174-109-247-98.nc.res.rr.com [174.109.247.98]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0D25160767; Tue, 3 Apr 2018 12:44:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522759456; bh=zaxnSUlb37JTKNdVXqsCv9R3/805pcIxbNt87SRzb4I=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=PVm3OJmBPrAXrds2L4Qa//IggVVSkiM5KR55gehcTU/ud1LDH1ne5D5tQMDG9KqTW PXX3O9NF5ybAV6q6TrRpZ84Dit3knVUc0M3ja9ZwNMhESGf4jpMbt0A7mLlh+W1LCy LoTnM0vGURUgNkwl3eyf9mVZRq2Y18u6Q9jgoWG8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0D25160767 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org Subject: Re: [PATCH v2 2/2] io: prevent compiler reordering on the default readX() implementation To: Arnd Bergmann , Mark Rutland Cc: Timur Tabi , sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org, Linux ARM , linux-arch , Linux Kernel Mailing List References: <1522425494-2916-1-git-send-email-okaya@codeaurora.org> <1522425494-2916-2-git-send-email-okaya@codeaurora.org> <20180403104925.fuyajja6tyanlna4@lakrids.cambridge.arm.com> From: Sinan Kaya Message-ID: Date: Tue, 3 Apr 2018 08:44:13 -0400 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/3/2018 7:13 AM, Arnd Bergmann wrote: > On Tue, Apr 3, 2018 at 12:49 PM, Mark Rutland wrote: >> Hi, >> >> On Fri, Mar 30, 2018 at 11:58:13AM -0400, Sinan Kaya wrote: >>> The default implementation of mapping readX() to __raw_readX() is wrong. >>> readX() has stronger ordering semantics. Compiler is allowed to reorder >>> __raw_readX(). >> >> Could you please specify what the compiler is potentially reordering >> __raw_readX() against, and why this would be wrong? >> >> e.g. do we care about prior normal memory accesses, subsequent normal >> memory accesses, and/or other IO accesses? >> >> I assume that the asm-generic __raw_{read,write}X() implementations are >> all ordered w.r.t. each other (at least for a specific device). > > I think that is correct: the compiler won't reorder those because of the > 'volatile' pointer dereference, but it can reorder access to a normal > pointer against a __raw_readl()/__raw_writel(), which breaks the scenario > of using writel to trigger a DMA, or using a readl to see if a DMA has > completed. Yes, we are worried about memory update vs. IO update ordering here. That was the reason why barrier() was introduced in this patch. I'll try to clarify that better in the commit text. > > The question is whether we should use a stronger barrier such > as rmb() amd wmb() here rather than a simple compiler barrier. > > I would assume that on complex architectures with write buffers and > out-of-order prefetching, those are required, while on architectures > without those features, the barriers are cheap. That's my reasoning too. I'm trying to follow the x86 example here where there is a compiler barrier in writeX() and readX() family of functions. > > Arnd > -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.