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[209.132.180.67]) by mx.google.com with ESMTP id u10si1939940pgc.532.2018.04.03.05.56.37; Tue, 03 Apr 2018 05:56:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=bx6OYZBS; dkim=pass header.i=@codeaurora.org header.s=default header.b=eVAD8F7Q; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932209AbeDCMzX (ORCPT + 99 others); Tue, 3 Apr 2018 08:55:23 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:33226 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932175AbeDCMzS (ORCPT ); Tue, 3 Apr 2018 08:55:18 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 28E4E60F61; Tue, 3 Apr 2018 12:55:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522760118; bh=Q3pEhIuXc8dkyfiB5T3rn1HjTptAtr058BR0NWCQUcQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bx6OYZBSHTd2mQteViZmfmlcQrRjPJazCpm5KEDLjO1jli8uwYfVqcwMnjCJ7fv1/ R5w9TnVqDNK54edm1zXeT1k9bO/o6QMItQI5BT7o6D5OP5Akd4HS805qfaUqRSiMWP Nkj8hKf7xytzwCNoc+wq4gepvGabxcZuN6TFfbDE= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id C12F160C65; Tue, 3 Apr 2018 12:55:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522760117; bh=Q3pEhIuXc8dkyfiB5T3rn1HjTptAtr058BR0NWCQUcQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eVAD8F7QMN1UqGoHse1rj3HPW/CXyniIKHn0i1X13bdrTzZFcs2UMPPJBrpUA0TKO ssvM/q3Qv8KcZZCEtYCClHZnUcm0+UXek5upSF70rvRNEmQyxWjhXWDXwfuz7tijsl lmC+t3i3xfaGXaAxmZhx9UDwTsoo9BRBFf84EOhM= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C12F160C65 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: linux-mips@linux-mips.org, arnd@arndb.de, timur@codeaurora.org, sulrich@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sinan Kaya , Ralf Baechle , James Hogan , Paul Burton , linux-kernel@vger.kernel.org Subject: [PATCH v3 2/2] MIPS: io: add a barrier after register read in readX() Date: Tue, 3 Apr 2018 08:55:04 -0400 Message-Id: <1522760109-16497-2-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522760109-16497-1-git-send-email-okaya@codeaurora.org> References: <1522760109-16497-1-git-send-email-okaya@codeaurora.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org While a barrier is present in writeX() function before the register write, a similar barrier is missing in the readX() function after the register read. This could allow memory accesses following readX() to observe stale data. Signed-off-by: Sinan Kaya Reported-by: Arnd Bergmann --- arch/mips/include/asm/io.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index fd00ddaf..6ac502f 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -377,6 +377,7 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \ BUG(); \ } \ \ + rmb(); \ return pfx##ioswab##bwlq(__mem, __val); \ } -- 2.7.4