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Date:   Tue, 3 Apr 2018 17:26:04 +0200
From:   Wolfram Sang <wsa@the-dreams.de>
To:     Pierre Yves MORDRET <pierre-yves.mordret@st.com>
Cc:     Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        Alexandre Torgue <alexandre.torgue@st.com>,
        linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/6] i2c: i2c-stm32f7: Add slave support
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On Mon, Mar 26, 2018 at 10:41:51AM +0200, Pierre Yves MORDRET wrote:
>=20
>=20
> On 03/25/2018 08:16 PM, Wolfram Sang wrote:
> > On Wed, Mar 21, 2018 at 05:48:56PM +0100, Pierre-Yves MORDRET wrote:
> >> This patch adds slave support for I2C controller embedded in STM32F7 S=
oC
> >>
> >> Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
> >> Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
> >=20
> > Looks OK from a first look. What kind of tests did you do?
>=20
> As mentioned for 10-bit, I'm using 2 I2C instances from the SoC.
> Here are the tests I dit:
>  - Master/slave send in 7 and 10 bits
>  - master/slave recv in 7 and 10 bits
>  - E2PROM Read/Write

As far as I understand the code now, both instances can be master /
slave simultanously on the same bus?


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