Received: by 10.213.65.68 with SMTP id h4csp3660251imn; Tue, 3 Apr 2018 08:40:48 -0700 (PDT) X-Google-Smtp-Source: AIpwx4/c54TPGWsigcY5xgNNW4CmMFlkfyKDrP+Hegm7rtLc9GFtYE4nU+bvLPurWfyloTage1++ X-Received: by 10.101.64.7 with SMTP id f7mr9565433pgp.216.1522770048716; Tue, 03 Apr 2018 08:40:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522770048; cv=none; d=google.com; s=arc-20160816; b=ZuzSaEJ5lLw0FP5hGyQp0LvjlrqlpGCi9bkkWafV5dDmXP2Qb2tGWJ3OcQ1C0MRAum cP7SHzRDN9QeBVhaJJ9inqlW8ywtm/hoLBGu0ua7lm/KKDDYtCss2p1Q7xfGHltAW9Jv cCuH3ImAlu7fwciMV4GBej2Evc3oyRgJWo3/ESgj/Jwe1T4pSEwe84A09j6n0m07oiEG +tk7S+sfkI3sAzqHuGFLTVEvHvhaV0UF/daX66ZuOXF26jNrR01ds/gFpxcnv4K2d1fI zIuulYm8pmyo/QB26qmXNNM6deo1O4g1Vws82w/O1nRNwy3GdZzBKQXTeuj6RDocg/sO DRXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature :arc-authentication-results; bh=Uk/zexQcIMmcXt2u+bZNNzGb69kRMzxGSZMM3Hss8pk=; b=OgJSsoBTpuv80zJ+OrLzWMGkw4H1d1szBff0niSuayaF6EAyJL2322vqQRQlyUGLli N4TkexobidJdIEVy4nvziliAqrdxpUb44NbbYEJLWQpro6QaKvPZSs4W20o2Y+AyBfrh O+zVK12egtzGGSE+ceXPugDh41pgkAU6k8td6u6A+CTz3nxb03S9ikFhOnfY2q9GUNZn QPhIQBcyImyJsv0PHMgUNoxzryxVlSgQs193JdtYtzvp59dB6HNtPqHfd2Fu8yRbypGW c6tMa8IH8pny9ca1Q76HlbEQqOUWHodNZD7yaFL3Se46zdWpLAoASmy1qlh+NDidwgUP 3trQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=nej04Qzp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n10-v6si738963plk.689.2018.04.03.08.40.33; Tue, 03 Apr 2018 08:40:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=nej04Qzp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751913AbeDCPjP (ORCPT + 99 others); Tue, 3 Apr 2018 11:39:15 -0400 Received: from mail-qk0-f194.google.com ([209.85.220.194]:39860 "EHLO mail-qk0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751223AbeDCPjL (ORCPT ); Tue, 3 Apr 2018 11:39:11 -0400 Received: by mail-qk0-f194.google.com with SMTP id j73so19073679qke.6; Tue, 03 Apr 2018 08:39:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=Uk/zexQcIMmcXt2u+bZNNzGb69kRMzxGSZMM3Hss8pk=; b=nej04QzpWIM4NOm37YcfBtqJB66RH5ysnU0kQX7ju2miBCmMca283LhO7EcLtJwL3h SB2CVHQ1434EZDgcxwPs2QnVsmonlJ/DIBjjvs22OFFkrMVrj0L7b/zE5SCkGa5ci5Dg YVO1hoIwD8LCycD8UqF0VnF0vpo2siLcU6DMT41eBJXQM/xMC4mbfstFZxcYgwdLguAZ t6App4JuLO1lCvsUUsU/Y342/BR+avR89LokzHu7OrEOmITVdK3TDH6T7W7UKOY6fv/6 pgFBuburMS+KWVRQULez8qGKQYWezMb8r7BPpgG2tirj3LP684KoDzGl//IjtgNsONKj 6i+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=Uk/zexQcIMmcXt2u+bZNNzGb69kRMzxGSZMM3Hss8pk=; b=cBwskDplmoLuaEw3bB2dlvY7ipgCl9jShinK7qFPNIlBHsX991/5EPn8t7/Q9qFdkU PDR31tg/CPdRjbvlnFT2q7PJDZtzeOYH1utAbMQSl0C4qxtSd2SHt0LttbyUjNV7RzBI MBoZIRa1pqGE8Lopn52qrNeaxx4lEDAQxwQ/exgjuQUJ5zV3tgUIrW2f4ybJsM/f2YYo bK229kgmURX5qQWj9+csjawHo9HSKbKcWSnz3w6u8fPFDJsknZzLZcVO30oVzQeMGL2T nKQ5DfrWFDwUGo2+xXlIQv78VRWcliWN9/82kQgJPxy6t6Krvi2tXe7N9laKTs6lfRkb ZgaQ== X-Gm-Message-State: ALQs6tDPwaWSgpqr8HrTY6FDJGHLHTDJiZmACeW+FCiJ4CHSLeQff7wx 5h0nPZhkoL6TSP5a5xU2L62W2ZwBFE04DANH9I4= X-Received: by 10.55.239.9 with SMTP id j9mr3786247qkk.343.1522769949830; Tue, 03 Apr 2018 08:39:09 -0700 (PDT) MIME-Version: 1.0 Received: by 10.12.185.25 with HTTP; Tue, 3 Apr 2018 08:39:08 -0700 (PDT) In-Reply-To: <87tvss48ti.fsf@belgarion.home> References: <20180402142656.26815-1-robert.jarzmik@free.fr> <20180402142656.26815-3-robert.jarzmik@free.fr> <87tvss48ti.fsf@belgarion.home> From: Arnd Bergmann Date: Tue, 3 Apr 2018 17:39:08 +0200 X-Google-Sender-Auth: 5adpF_wUGcNLyez34-tIusmfvTk Message-ID: Subject: Re: [PATCH 02/15] ARM: pxa: add dma slave map To: Robert Jarzmik Cc: Daniel Mack , Haojian Zhuang , Bartlomiej Zolnierkiewicz , Tejun Heo , Vinod Koul , Mauro Carvalho Chehab , Ulf Hansson , Ezequiel Garcia , Boris Brezillon , David Woodhouse , Brian Norris , Marek Vasut , Richard Weinberger , Cyrille Pitchen , Nicolas Pitre , Samuel Ortiz , Greg Kroah-Hartman , Jaroslav Kysela , Takashi Iwai , Liam Girdwood , Mark Brown , Russell King , Linux ARM , Linux Kernel Mailing List , IDE-ML , dmaengine@vger.kernel.org, Linux Media Mailing List , linux-mmc , linux-mtd , Networking , devel@driverdev.osuosl.org, alsa-devel@alsa-project.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Apr 3, 2018 at 5:18 PM, Robert Jarzmik wrote: > Arnd Bergmann writes: > >>> + { "smc911x.0", "rx", PDMA_FILTER_PARAM(LOWEST, -1) }, >>> + { "smc911x.0", "tx", PDMA_FILTER_PARAM(LOWEST, -1) }, >>> + { "smc91x.0", "data", PDMA_FILTER_PARAM(LOWEST, -1) }, >> >> This one is interesting, as you are dealing with an off-chip device, >> and the channel number is '-'1. How does this even work? Does it >> mean > > This relies on pxa_dma, in which the "-1" for a requestor line means "no > requestor" or said in another way "always requesting". As a consequence, as soon > as the DMA descriptors are queued, the transfer begins, and it is supposed > implicitely that the FIFO output availability is at least as quick as the system > bus and the DMA size is perfectly fit for the FIFO available bytes. > > This is what has been the underlying of DMA transfers of smc91x(x) on the PXA > platforms, where the smc91x(s) are directly wired on the system bus (the same > bus having DRAM, SRAM, IO-mapped devices). Ok, I looked at the driver in more detail now and found the scary parts. So it's using the async DMA interface to do synchronous DMA in interrupt context in order to transfer the rx data faster than an readsl() would, correct? It still feels odd to me that there is an entry in the slave map for a device that does not have a request line. However, it also seems that the entire code in those two drivers that deals with DMA is specific to PXA anyway, so maybe it can be done differently: instead of calling dma_request_slave_channel_compat() or dma_request_chan() with a fake request line, how about calling dma_request_channel() with an NULL filter function and data, and have the driver handle the empty data case the same way as the rq=-1 case today? >>> + /* PXA25x specific map */ >>> + { "pxa25x-ssp.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) }, >>> + { "pxa25x-ssp.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) }, >>> + { "pxa25x-nssp.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) }, >>> + { "pxa25x-nssp.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) }, >>> + { "pxa25x-nssp.2", "rx", PDMA_FILTER_PARAM(LOWEST, 23) }, >>> + { "pxa25x-nssp.2", "tx", PDMA_FILTER_PARAM(LOWEST, 24) }, >>> + { "pxa-pcm-audio", "nssp2_rx", PDMA_FILTER_PARAM(LOWEST, 15) }, >>> + { "pxa-pcm-audio", "nssp2_tx", PDMA_FILTER_PARAM(LOWEST, 16) }, >>> + { "pxa-pcm-audio", "nssp3_rx", PDMA_FILTER_PARAM(LOWEST, 23) }, >>> + { "pxa-pcm-audio", "nssp3_tx", PDMA_FILTER_PARAM(LOWEST, 24) }, >>> + >>> + /* PXA27x specific map */ >>> + { "pxa-pcm-audio", "ssp3_rx", PDMA_FILTER_PARAM(LOWEST, 66) }, >>> + { "pxa-pcm-audio", "ssp3_tx", PDMA_FILTER_PARAM(LOWEST, 67) }, >>> + { "pxa27x-camera.0", "CI_Y", PDMA_FILTER_PARAM(HIGHEST, 68) }, >>> + { "pxa27x-camera.0", "CI_U", PDMA_FILTER_PARAM(HIGHEST, 69) }, >>> + { "pxa27x-camera.0", "CI_V", PDMA_FILTER_PARAM(HIGHEST, 70) }, >>> + >>> + /* PXA3xx specific map */ >>> + { "pxa-pcm-audio", "ssp4_rx", PDMA_FILTER_PARAM(LOWEST, 2) }, >>> + { "pxa-pcm-audio", "ssp4_tx", PDMA_FILTER_PARAM(LOWEST, 3) }, >>> + { "pxa2xx-mci.1", "rx", PDMA_FILTER_PARAM(LOWEST, 93) }, >>> + { "pxa2xx-mci.1", "tx", PDMA_FILTER_PARAM(LOWEST, 94) }, >>> + { "pxa3xx-nand", "data", PDMA_FILTER_PARAM(LOWEST, 97) }, >>> + { "pxa2xx-mci.2", "rx", PDMA_FILTER_PARAM(LOWEST, 100) }, >>> + { "pxa2xx-mci.2", "tx", PDMA_FILTER_PARAM(LOWEST, 101) }, >>> +}; >> >> Since more than half the entries in here are chip specific, maybe it would be >> better to split that table into three and have a copy for each one in >> arch/arm/mach-pxa/pxa{25x.27x.3xx}.c? > Mmmh, today the split is : > - 16 common entries > - 10 pxa25x specific entries > - 5 pxa27x specific entries > - 7 pxa3xx specific entries > => total of 38 lines > > After the split we'll have : > - 26 pxa25x specific entries > - 21 pxa27x specific entries > - 23 pxa3xx specific entries > => total of 70 lines > > That doubles the number of lines, not counting the declarations, and amending of > pxa2xx_set_dmac_info(). > > If you think it's worth it, what is the driving benefit behind ? It seems a bit cleaner to only register the tables for the dma lines that are actually present on a given chip. >> Does that mean it's actually a memory-to-memory transfer with a device being >> on the external SRAM interface? > I'm taking this is the follow up to the "-1" question :0 Right. Arnd