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From:   Tomer Maimon <tmaimon77@gmail.com>
To:     arnd@arndb.de, robh+dt@kernel.org, mark.rutland@arm.com,
        linux@armlinux.org.uk, avifishman70@gmail.com,
        brendanhiggins@google.com, venture@google.com, joel@jms.id.au
Cc:     devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        openbmc@lists.ozlabs.org, Tomer Maimon <tmaimon77@gmail.com>
Subject: [PATCH v1 2/6] arm: dts: modify UART compatible name in NPCM750 device tree
Date:   Wed,  4 Apr 2018 14:10:58 +0300
Message-Id: <1522840262-21635-3-git-send-email-tmaimon77@gmail.com>
In-Reply-To: <1522840262-21635-1-git-send-email-tmaimon77@gmail.com>
References: <1522840262-21635-1-git-send-email-tmaimon77@gmail.com>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Modify UART compatible name in a common device tree for all Nuvoton
NPCM750 BMCs.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
 arch/arm/boot/dts/nuvoton-npcm750.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton-npcm750.dtsi
index cacd0fde5914..286f139fdc7c 100644
--- a/arch/arm/boot/dts/nuvoton-npcm750.dtsi
+++ b/arch/arm/boot/dts/nuvoton-npcm750.dtsi
@@ -150,7 +150,7 @@
 			};
 
 			serial0: serial@1000 {
-				compatible = "ns16550a";
+				compatible = "nuvoton,npcm750-uart";
 				reg = <0x1000 0x1000>;
 				clocks = <&clk 14>;
 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
@@ -159,7 +159,7 @@
 			};
 
 			serial1: serial@2000 {
-				compatible = "ns16550a";
+				compatible = "nuvoton,npcm750-uart";
 				reg = <0x2000 0x1000>;
 				clocks = <&clk 14>;
 				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
@@ -168,7 +168,7 @@
 			};
 
 			serial2: serial@3000 {
-				compatible = "ns16550a";
+				compatible = "nuvoton,npcm750-uart";
 				reg = <0x3000 0x1000>;
 				clocks = <&clk 14>;
 				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
@@ -177,7 +177,7 @@
 			};
 
 			serial3: serial@4000 {
-				compatible = "ns16550a";
+				compatible = "nuvoton,npcm750-uart";
 				reg = <0x4000 0x1000>;
 				clocks = <&clk 14>;
 				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.14.1