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[209.132.180.67]) by mx.google.com with ESMTP id 32-v6si5466018pla.348.2018.04.04.05.45.19; Wed, 04 Apr 2018 05:45:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=nlfFXyio; dkim=pass header.i=@codeaurora.org header.s=default header.b=oUM7oIwX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751285AbeDDMmv (ORCPT + 99 others); Wed, 4 Apr 2018 08:42:51 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:40268 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750915AbeDDMms (ORCPT ); Wed, 4 Apr 2018 08:42:48 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 7F7A760F6E; Wed, 4 Apr 2018 12:42:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522845767; bh=JbqPO/XKhIy14G697A1fB9lAqUK94bcQbaTNWiBCN4I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nlfFXyiop9D0/G+s6aGIG+mPwaQSwzhsVL8/vopKLvTAYN5tpscT4UmRd3fPbDL5c fYIZtdOBVbarj+MHJ8SEBnTcHM/K6/h3AIM41ta2qyp2MAZYqhY+Pb+AuDd9U25NIH 6vUIj1W/SWBUTqCL38hSXOyeoyAonEaLOV6GZPJg= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from absahu-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: absahu@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E44B560F5F; Wed, 4 Apr 2018 12:42:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1522845766; bh=JbqPO/XKhIy14G697A1fB9lAqUK94bcQbaTNWiBCN4I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oUM7oIwXQ+pXB1OBN0rzIFqG0qWHVb1jVAcQpeZoSCtQJNqM5w7x3Arkwpr8EhHK6 Z5Om3MiDoNvJnE4NI/JrXenBZLvwlxJaPd0gfETt6DUqpj2U1Rp6l0NNV4wKJqDjKo +TBeR8Ob2Vkp1rVJ3F/Vfy+M8ZUOsDjyeDZRE4yM= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E44B560F5F Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=absahu@codeaurora.org From: Abhishek Sahu To: Boris Brezillon Cc: David Woodhouse , Brian Norris , Marek Vasut , Richard Weinberger , Cyrille Pitchen , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Andy Gross , Archit Taneja , Abhishek Sahu Subject: [PATCH 1/9] mtd: nand: qcom: use the ecc strength from device parameter Date: Wed, 4 Apr 2018 18:12:17 +0530 Message-Id: <1522845745-6624-2-git-send-email-absahu@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1522845745-6624-1-git-send-email-absahu@codeaurora.org> References: <1522845745-6624-1-git-send-email-absahu@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently the driver uses the ECC strength specified in device tree. The ONFI or JEDEC device parameter page contains the ‘ECC correctability’ field which indicates the number of bits that the host should be able to correct per 512 bytes of data. The ecc correctability is assigned in chip parameter during device probe time. QPIC/EBI2 NAND supports 4/8-bit ecc correction. The Same kind of board can have different NAND parts so use the ecc strength from device parameter (if its non zero) instead of device tree. Signed-off-by: Abhishek Sahu --- drivers/mtd/nand/qcom_nandc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c index 563b759..8dd40de 100644 --- a/drivers/mtd/nand/qcom_nandc.c +++ b/drivers/mtd/nand/qcom_nandc.c @@ -2334,6 +2334,14 @@ static int qcom_nand_host_setup(struct qcom_nand_host *host) return -EINVAL; } + /* + * Read the required ecc strength from NAND device and overwrite + * the device tree ecc strength for devices which require + * ecc correctability bits >= 8 + */ + if (chip->ecc_strength_ds >= 8) + ecc->strength = 8; + wide_bus = chip->options & NAND_BUSWIDTH_16 ? true : false; if (ecc->strength >= 8) { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation