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[209.132.180.67]) by mx.google.com with ESMTP id u9si3863987pgc.790.2018.04.04.09.22.17; Wed, 04 Apr 2018 09:22:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=cmFFUkEo; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752163AbeDDQVJ (ORCPT + 99 others); Wed, 4 Apr 2018 12:21:09 -0400 Received: from vern.gendns.com ([206.190.152.46]:55707 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751769AbeDDQVI (ORCPT ); Wed, 4 Apr 2018 12:21:08 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:MIME-Version:Date:Message-ID:From:References:Cc:To:Subject:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=BS2CLKzQ3HpFoJKZ/a9ZUcs8jpj0bVJu0+lmyOMlpN0=; b=cmFFUkEog5UmNdRsC4S4wf2q6S KYqCYbXrlHeQ9ljrU4zOh1V0HVJZCpZDxzfSbp75GdHG92hXShwjP3I3uOrazVc27FdrMLdP3da9a bEuGEysBK6m1kFbAkNmXeXkwkzUdUGT2p2J7M9ACt/0tIerZSsM/T91OrXFq74q8YxEviKTvX/GkN w4M38v3z6/CkKjiYzzkCELN4YJnut+WUx5LRzCcBXCjUHrlVdbqEvMrl7Xq9Q1pB7th3ZorK7G8x/ +1fYcOohoWDEWDuF9mf3taAGf6cdDJju8/MXr+4KKifqNcSKWHliqwimmj8bkH4FEn8NZvk01OfcX 7p1dvGmw==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:39232 helo=[192.168.0.134]) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1f3l9l-001PLk-M1; Wed, 04 Apr 2018 12:21:05 -0400 Subject: Re: [PATCH v8 25/42] ARM: davinci: dm644x: add new clock init using common clock framework To: Sekhar Nori , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Bartosz Golaszewski , Adam Ford , linux-kernel@vger.kernel.org References: <1521168778-27236-1-git-send-email-david@lechnology.com> <1521168778-27236-26-git-send-email-david@lechnology.com> <333f49c7-bafd-8e2d-65e9-7d1aff4836de@ti.com> From: David Lechner Message-ID: Date: Wed, 4 Apr 2018 11:21:02 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <333f49c7-bafd-8e2d-65e9-7d1aff4836de@ti.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/03/2018 05:26 AM, Sekhar Nori wrote: > On Friday 16 March 2018 08:22 AM, David Lechner wrote: >> +static struct resource dm644x_pll1_resources[] = { >> + { >> + .start = DAVINCI_PLL1_BASE, >> + .end = DAVINCI_PLL1_BASE + SZ_4K - 1, > > The .end should be DAVINCI_PLL1_BASE + SZ_1K - 1, otherwise it prevents > PLL2 from getting registered. > >> + .flags = IORESOURCE_MEM, >> + }, >> +}; >> + >> +static struct platform_device dm644x_pll1_device = { >> + .name = "dm644x-pll1", >> + .id = -1, >> + .resource = dm644x_pll1_resources, >> + .num_resources = ARRAY_SIZE(dm644x_pll1_resources), >> +}; >> + >> +static struct resource dm644x_pll2_resources[] = { >> + { >> + .start = DAVINCI_PLL2_BASE, >> + .end = DAVINCI_PLL2_BASE + SZ_4K - 1, > > And this too should be fixed, else it prevents the PSC from getting > registered. Thanks. I've checked and this needs to be fixed for dm646x, dm355 and dm365 as well.