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[209.132.180.67]) by mx.google.com with ESMTP id w9si4342677pfk.14.2018.04.04.09.46.54; Wed, 04 Apr 2018 09:47:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=mYZOCbRT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752403AbeDDQpo (ORCPT + 99 others); Wed, 4 Apr 2018 12:45:44 -0400 Received: from mail-pl0-f65.google.com ([209.85.160.65]:36349 "EHLO mail-pl0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751979AbeDDQpn (ORCPT ); Wed, 4 Apr 2018 12:45:43 -0400 Received: by mail-pl0-f65.google.com with SMTP id 91-v6so14829351pld.3 for ; Wed, 04 Apr 2018 09:45:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=date:subject:cc:from:to:message-id; bh=EXzihWK5VbtHl6yl9jxIrzoFLZaRWVCRm6sok4A83eE=; b=mYZOCbRTpZwlA8SoNqUhpNgt0NLdxIFjRmwjKChGiJrQwFG0z4TQpj4QmwlKdnf/HZ vC60i+9yQ+8rwE4sVHZiLVOx6ErODGlPcafLuGGoSLUmdPAfbvXQog0wiVvynBO5fUs7 TYJ22WaxVWi2Cmu12UbM1yRjZNjWblAgz8T1PaRU2reKSONWdOAwvBcJvmazqge8AQXP fJTuPHaO1hQs2P9hmPWfrAHxxfZCAkl8q+OK9lZijpUwBneA2XAZ8tERLXTWZ3bwAw/t rzB2QeuOmV33UvJIWEIXSugnISMFnhEpRonyAjEn0AxujU2LmiB/PUKbrd02+CMPR22l fW5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:subject:cc:from:to:message-id; bh=EXzihWK5VbtHl6yl9jxIrzoFLZaRWVCRm6sok4A83eE=; b=DRYGXGAMSlG7ohs0pwhVtEzwEBy278VY44mJgZfS24FAqZk2Kq0MMNGrRUkiahusYm 8BTR64XhuVwQL39lLXAJySCMfHni/nf10+LQuQimKkVFWg1d3qUqPt9oV86GqFxGlGkU rTYEL+/wdWB/VPfMxUw6v0rvrXRQfVe9iSBbS9CGRcGdHC37OoZ2fRCDXV5fwZ8VBj9B hNb5Tsz3cxZGG31Y8Y62qjQ+dYQK8lnWgqTjlzWVnnoIxH5LtIQOAGpqQsKN3v6V5shk Fpiygs8f+bgUTgXrlGaTPeMg/6fhSSBtM9aRWDLYiNtj7tOzgcyA/BWRmd6gh9Y16CJT OOHw== X-Gm-Message-State: AElRT7Gu3YwqfQWSvNx8E7l7DdriGZTUC/Gn9/i9cUWCYM9y6f0N6yPC JjMK7Vn+KT4Cla55vrA3GZspmTNsazaozA== X-Received: by 2002:a17:902:464:: with SMTP id 91-v6mr19189948ple.126.1522860342662; Wed, 04 Apr 2018 09:45:42 -0700 (PDT) Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id i127sm12087707pfc.136.2018.04.04.09.45.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 04 Apr 2018 09:45:41 -0700 (PDT) Date: Wed, 04 Apr 2018 09:45:41 -0700 (PDT) X-Google-Original-Date: Wed, 04 Apr 2018 09:45:37 PDT (-0700) Subject: [GIT PULL] RISC-V changes for 4.17 CC: patches@groups.riscv.org From: Palmer Dabbelt To: Linus Torvalds , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Message-ID: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following changes since commit 0adb32858b0bddf4ada5f364a84ed60b196dbcda: Linux 4.16 (2018-04-01 14:20:27 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git tags/riscv-for-linus-4.17-mw0 for you to fetch changes up to f6a11d9febad1f308fe4119a54b92e335e7c8032: RISC-V: Rename CONFIG_CMDLINE_OVERRIDE to CONFIG_CMDLINE_FORCE (2018-04-03 09:48:27 -0700) ---------------------------------------------------------------- RISC-V changes for 4.17 This tag contains the new features we'd like to incorporate into the RISC-V port for 4.17. We might have a bit more stuff land later in the merge window, but I wanted to get this out earlier just so everyone can see where we currently stand. A short summary of the changes is: * We've added support for dynamic ftrace on RISC-V targets. * There have been a handful of cleanups to our atomic and locking routines. They now more closely match the released RISC-V memory model draft. * Our module loading support has been cleaned up and is now enabled by default, despite some limitations still existing. * A patch to define COMMANDLINE_FORCE instead of COMMANDLINE_OVERRIDE so the generic device tree code picks up handling all our command line stuff. There's more information in the merge commits for each patch set. ---------------------------------------------------------------- Alan Kao (6): riscv/ftrace: Add RECORD_MCOUNT support riscv/ftrace: Add dynamic function tracer support riscv/ftrace: Add dynamic function graph tracer support riscv/ftrace: Add ARCH_SUPPORTS_FTRACE_OPS support riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support riscv/ftrace: Add HAVE_FUNCTION_GRAPH_RET_ADDR_PTR support Andrea Parri (3): riscv/barrier: Define __smp_{store_release,load_acquire} riscv/spinlock: Strengthen implementations with fences riscv/atomic: Strengthen implementations with fences Palmer Dabbelt (4): RISC-V: Add dynamic ftrace support for RISC-V platforms RISC-V: Assorted memory model fixes RISC-V: Fixes to module loading RISC-V: Rename CONFIG_CMDLINE_OVERRIDE to CONFIG_CMDLINE_FORCE Zong Li (11): RISC-V: Add sections of PLT and GOT for kernel module RISC-V: Add section of GOT.PLT for kernel module RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module RISC-V: Support CALL relocation type in kernel module RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq RISC-V: Support ALIGN relocation type in kernel module RISC-V: Support ADD32 relocation type in kernel module RISC-V: Support SUB32 relocation type in kernel module RISC-V: Enable module support in defconfig RISC-V: Add definition of relocation types arch/riscv/Kconfig | 12 +- arch/riscv/Makefile | 8 + arch/riscv/configs/defconfig | 2 + arch/riscv/include/asm/atomic.h | 417 +++++++++++++++++++++++------------- arch/riscv/include/asm/barrier.h | 15 ++ arch/riscv/include/asm/cmpxchg.h | 391 +++++++++++++++++++++++++++------ arch/riscv/include/asm/fence.h | 12 ++ arch/riscv/include/asm/ftrace.h | 56 +++++ arch/riscv/include/asm/module.h | 113 ++++++++++ arch/riscv/include/asm/spinlock.h | 29 +-- arch/riscv/include/uapi/asm/elf.h | 7 + arch/riscv/kernel/Makefile | 6 +- arch/riscv/kernel/ftrace.c | 175 ++++++++++++++- arch/riscv/kernel/mcount-dyn.S | 239 +++++++++++++++++++++ arch/riscv/kernel/mcount.S | 22 +- arch/riscv/kernel/module-sections.c | 156 ++++++++++++++ arch/riscv/kernel/module.c | 179 +++++++++++++++- arch/riscv/kernel/module.lds | 8 + arch/riscv/kernel/stacktrace.c | 6 + scripts/recordmcount.pl | 5 + 20 files changed, 1603 insertions(+), 255 deletions(-) create mode 100644 arch/riscv/include/asm/fence.h create mode 100644 arch/riscv/include/asm/module.h create mode 100644 arch/riscv/kernel/mcount-dyn.S create mode 100644 arch/riscv/kernel/module-sections.c create mode 100644 arch/riscv/kernel/module.lds