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[209.132.180.67]) by mx.google.com with ESMTP id r7si4005046pgv.368.2018.04.04.11.38.51; Wed, 04 Apr 2018 11:39:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751454AbeDDShp (ORCPT + 99 others); Wed, 4 Apr 2018 14:37:45 -0400 Received: from mail-qt0-f194.google.com ([209.85.216.194]:36196 "EHLO mail-qt0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751296AbeDDShn (ORCPT ); Wed, 4 Apr 2018 14:37:43 -0400 Received: by mail-qt0-f194.google.com with SMTP id w23so16086110qtn.3 for ; Wed, 04 Apr 2018 11:37:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:message-id:subject:from:to:cc:date:in-reply-to :references:organization:mime-version:content-transfer-encoding; bh=rZoXiFNjkNZuDmXkDw5D92ALWctx7XA+VwjGKQgfLOg=; b=rWuGsQ3T5cGAabMlj0+vRkIz0dsGRz8eeW2UojtSQyndKY+rMN6664MpfmGqRmpLhj N/HCDn/IKvZyXu+g+8MZZZiFeOuvH+ANmupKYKZQZNdlqUbNMD+tfudu2NrIFhjRYcg4 8dSj460bITnGafs0PkwxQ1Ad58PXgFIj4SOpmSZwKEJ3qbDDr8kl8o+6XiI0RaO9I4GR oxFPkESMma3VegbxgpwvqqDVPfbTDdY6vua0iWrqj0CBGHCUtgOvx9rGvbmPnpS4l7CO MgwUCoyU/Sd5UaLCdzMK4Pse8yRFlGmBhTtu0FH55WRJxK+RKQBdJCzrtXsTaSLMCFji mlKg== X-Gm-Message-State: ALQs6tCDZJM7X0gCj5KwzVc/hLki+0zZ6tJ6LZG5Wfy8CkypPMH/nd00 cmu+PnftH0EWPzJQhaJRZq+V1Q== X-Received: by 10.200.46.227 with SMTP id i32mr28555813qta.157.1522867062902; Wed, 04 Apr 2018 11:37:42 -0700 (PDT) Received: from dhcp-10-20-1-55.bss.redhat.com ([144.121.20.162]) by smtp.gmail.com with ESMTPSA id j19sm4832398qtf.21.2018.04.04.11.37.41 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 04 Apr 2018 11:37:42 -0700 (PDT) Message-ID: <1522867061.12403.6.camel@redhat.com> Subject: Re: [PATCH v2] drm/i915: Keep AUX block running when disabling DPMS for MST From: Lyude Paul To: Ville =?ISO-8859-1?Q?Syrj=E4l=E4?= Cc: intel-gfx@lists.freedesktop.org, Laura Abbott , Dhinakaran Pandiyan , stable@vger.kernel.org, Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Date: Wed, 04 Apr 2018 14:37:41 -0400 In-Reply-To: <20180404153429.GE5453@intel.com> References: <20180402212142.19841-1-lyude@redhat.com> <20180402212617.21247-1-lyude@redhat.com> <20180404153429.GE5453@intel.com> Organization: Red Hat Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.26.6 (3.26.6-1.fc27) Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2018-04-04 at 18:34 +0300, Ville Syrjälä wrote: > On Mon, Apr 02, 2018 at 05:26:16PM -0400, Lyude Paul wrote: > > While enabling/disabling DPMS before link training with MST hubs is > > perfectly valid; unfortunately disabling DPMS results in some devices > > disabling their AUX CH block as well. For SST this isn't as much of a > > problem, but for MST we need to be able to continue handling aux > > transactions even when none of the sinks are turned on since it's > > possible for us to have a single atomic commit which results in > > disabling each downstream sink, followed by subsequently re-enabling > > each sink. > > > > If we don't do this, we'll end up stalling any pending ESI interrupts > > from the sink for up to 1ms. Unfortunately, dropping ESIs during this > > timespan makes it so that link fallback retraining for MST (which I will > > be submitting to the ML shortly) fails due to the channel EQ failure > > interrupts potentially getting dropped. Additionally, when performing a > > modeset that brings the hub status's link status from bad -> good having > > ESIs disabled for that long causes us to miss the hub's response to us > > trying to start link training as well. > > > > Since any sink with MST is going to support DisplayPort 1.2 anyway, save > > us the hassle of trying to wait until the sink comes back up and just > > never shut the aux block down. > > > > Changes since v2: > > - Fix patch name, no functional changes > > > > Signed-off-by: Lyude Paul > > Cc: Laura Abbott > > Cc: Dhinakaran Pandiyan > > Cc: Ville Syrjälä > > Cc: stable@vger.kernel.org > > Fixes: ad260ab32a4d9 ("drm/i915/dp: Write to SET_POWER dpcd to enable MST > > hub.") > > --- > > drivers/gpu/drm/i915/intel_dp.c | 6 ++++-- > > 1 file changed, 4 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c > > b/drivers/gpu/drm/i915/intel_dp.c > > index 62f82c4298ac..0479c377981b 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -2589,11 +2589,13 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, > > int mode) > > return; > > > > if (mode != DRM_MODE_DPMS_ON) { > > + unsigned char data = intel_dp->is_mst ? > > + DP_SET_POWER_D3_AUX_ON : DP_SET_POWER_D3; > > This smells like a workaround for an actual bug somewhere. Why exactly > is the slower wakeup or the AUX block a problem for MST but not for SST > when the link training is exactly the same for SST and MST? I actually thought about this but I still think this is the appropriate fix. So; the real reason for the wakeup not being a problem with SST is that for DPMS on with SST, we actually do a wait to make sure that the hub is ready before continuing. And yes: I'm fairly sure SST does actually have around the same wakeup time that MST does, but with the wait we do it doesn't reallhy make a difference. With MST, we could do this but there's a few reasons I don't think we should: * We don't need to. D3_AUX_ON is a part of the 1.2 spec, so any hub that has MST is going to be guaranteed to have this. * Turning off the aux block means that there's a high chance we're going to miss ESIs from sinks * It's faster to keep the aux block on anyway > > > + > > if (downstream_hpd_needs_d0(intel_dp)) > > return; > > > > - ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, > > - DP_SET_POWER_D3); > > + ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, > > data); > > } else { > > struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp); > > > > -- > > 2.14.3 > > -- Cheers, Lyude Paul