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[209.132.180.67]) by mx.google.com with ESMTP id m10-v6si3585456plt.31.2018.04.04.12.01.30; Wed, 04 Apr 2018 12:01:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751494AbeDDS7N (ORCPT + 99 others); Wed, 4 Apr 2018 14:59:13 -0400 Received: from mail-qk0-f196.google.com ([209.85.220.196]:45477 "EHLO mail-qk0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751231AbeDDS7L (ORCPT ); Wed, 4 Apr 2018 14:59:11 -0400 Received: by mail-qk0-f196.google.com with SMTP id s9so23620701qke.12 for ; Wed, 04 Apr 2018 11:59:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:message-id:subject:from:to:cc:date:in-reply-to :references:organization:mime-version:content-transfer-encoding; bh=lgrQaDNW8EKo+cy94WUdhU0W9a0hlYhRocfIlUu4qq8=; b=Px/SzSMYU40s9u9yH2NE3TC10b4gSZDBFtiO3AKOF57GxPKaf67QdBe/hzh3FjVRa1 +sM1uHdZ7C2tHaAunLDlWQQ26EKqpjSlNMHISQHfKh6r8m14OGH0cAoqALWZAhZmuhJI a4xwuk+IX5l9BfDvCA6cjYFo8FJWNm6MOB7AhC6gpdcXZrBuYie/nGMD2x4mYx55MhbS cBAbuKmfvchDyNZ2lhs+qaicJP9Pfb/Jpe8CPxc5fbnoczx/w67fuuYISlQkrGPtWFzT HL688R8N6G08k+evwmLA297Dc8yXrI2p/nh4YYDGAH2YUq1JSa28O69WG4vW/HOm24DT OIgw== X-Gm-Message-State: ALQs6tAF6YLle4V8T6PAj51MonlBMMGG8HZ4OUL3Uy5zyPrq/bFUgsZu R4/CgJw8aqD72F8QNAM1qPJIbg== X-Received: by 10.55.15.23 with SMTP id z23mr6810663qkg.8.1522868351068; Wed, 04 Apr 2018 11:59:11 -0700 (PDT) Received: from dhcp-10-20-1-55.bss.redhat.com ([144.121.20.162]) by smtp.gmail.com with ESMTPSA id 127sm4423802qko.36.2018.04.04.11.59.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 04 Apr 2018 11:59:10 -0700 (PDT) Message-ID: <1522868349.12403.12.camel@redhat.com> Subject: Re: [PATCH v2] drm/i915: Keep AUX block running when disabling DPMS for MST From: Lyude Paul To: Ville =?ISO-8859-1?Q?Syrj=E4l=E4?= Cc: intel-gfx@lists.freedesktop.org, Laura Abbott , Dhinakaran Pandiyan , stable@vger.kernel.org, Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Date: Wed, 04 Apr 2018 14:59:09 -0400 In-Reply-To: <20180404185313.GG5453@intel.com> References: <20180402212142.19841-1-lyude@redhat.com> <20180402212617.21247-1-lyude@redhat.com> <20180404153429.GE5453@intel.com> <1522867061.12403.6.camel@redhat.com> <20180404185313.GG5453@intel.com> Organization: Red Hat Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.26.6 (3.26.6-1.fc27) Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2018-04-04 at 21:53 +0300, Ville Syrjälä wrote: > On Wed, Apr 04, 2018 at 02:37:41PM -0400, Lyude Paul wrote: > > On Wed, 2018-04-04 at 18:34 +0300, Ville Syrjälä wrote: > > > On Mon, Apr 02, 2018 at 05:26:16PM -0400, Lyude Paul wrote: > > > > While enabling/disabling DPMS before link training with MST hubs is > > > > perfectly valid; unfortunately disabling DPMS results in some devices > > > > disabling their AUX CH block as well. For SST this isn't as much of a > > > > problem, but for MST we need to be able to continue handling aux > > > > transactions even when none of the sinks are turned on since it's > > > > possible for us to have a single atomic commit which results in > > > > disabling each downstream sink, followed by subsequently re-enabling > > > > each sink. > > > > > > > > If we don't do this, we'll end up stalling any pending ESI interrupts > > > > from the sink for up to 1ms. Unfortunately, dropping ESIs during this > > > > timespan makes it so that link fallback retraining for MST (which I > > > > will > > > > be submitting to the ML shortly) fails due to the channel EQ failure > > > > interrupts potentially getting dropped. Additionally, when performing > > > > a > > > > modeset that brings the hub status's link status from bad -> good > > > > having > > > > ESIs disabled for that long causes us to miss the hub's response to us > > > > trying to start link training as well. > > > > > > > > Since any sink with MST is going to support DisplayPort 1.2 anyway, > > > > save > > > > us the hassle of trying to wait until the sink comes back up and just > > > > never shut the aux block down. > > > > > > > > Changes since v2: > > > > - Fix patch name, no functional changes > > > > > > > > Signed-off-by: Lyude Paul > > > > Cc: Laura Abbott > > > > Cc: Dhinakaran Pandiyan > > > > Cc: Ville Syrjälä > > > > Cc: stable@vger.kernel.org > > > > Fixes: ad260ab32a4d9 ("drm/i915/dp: Write to SET_POWER dpcd to enable > > > > MST > > > > hub.") > > > > --- > > > > drivers/gpu/drm/i915/intel_dp.c | 6 ++++-- > > > > 1 file changed, 4 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c > > > > b/drivers/gpu/drm/i915/intel_dp.c > > > > index 62f82c4298ac..0479c377981b 100644 > > > > --- a/drivers/gpu/drm/i915/intel_dp.c > > > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > > > @@ -2589,11 +2589,13 @@ void intel_dp_sink_dpms(struct intel_dp > > > > *intel_dp, > > > > int mode) > > > > return; > > > > > > > > if (mode != DRM_MODE_DPMS_ON) { > > > > + unsigned char data = intel_dp->is_mst ? > > > > + DP_SET_POWER_D3_AUX_ON : DP_SET_POWER_D3; > > > > > > This smells like a workaround for an actual bug somewhere. Why exactly > > > is the slower wakeup or the AUX block a problem for MST but not for SST > > > when the link training is exactly the same for SST and MST? > > > > I actually thought about this but I still think this is the appropriate > > fix. > > So; the real reason for the wakeup not being a problem with SST is that > > for > > DPMS on with SST, we actually do a wait to make sure that the hub is ready > > before continuing. And yes: I'm fairly sure SST does actually have around > > the > > same wakeup time that MST does, but with the wait we do it doesn't reallhy > > make a difference. With MST, we could do this but there's a few reasons I > > don't think we should: > > * We don't need to. D3_AUX_ON is a part of the 1.2 spec, so any hub that > > has > > MST is going to be guaranteed to have this. > > * Turning off the aux block means that there's a high chance we're going > > to > > miss ESIs from sinks > > And how exactly do we lose irqs? The hub/whatever throws the up req msgs > away if we don't read them within some really short time? That's my hypothesis at least. I'm betting that on the fact that when I was implementing MST retraining before we put the intel_dp_check_mst_status() (or whatever it's called) into the dig workqueue, getting the sink to go down and come back up was a lot more unreliable whenever I introduced anything that would block the esi handler for longer then a very brief period of time (say, 50-100ms?). I've seen some notes elsewhere too that seemed to imply for SST, things were pretty sensitive to irq latency (line 1050, intel_dp.c) so it wouldn't be terribly surprising if it's the same for MST. At the very least, now that we've got the ESI handler running in the dig worker things seem to have gotten a /lot/ more reliable now that we can basically go the whole modeset without blocking the ESI handler for very long. > > > * It's faster to keep the aux block on anyway > > > > > > > > > > > + > > > > if (downstream_hpd_needs_d0(intel_dp)) > > > > return; > > > > > > > > - ret = drm_dp_dpcd_writeb(&intel_dp->aux, > > > > DP_SET_POWER, > > > > - DP_SET_POWER_D3); > > > > + ret = drm_dp_dpcd_writeb(&intel_dp->aux, > > > > DP_SET_POWER, > > > > data); > > > > } else { > > > > struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp); > > > > > > > > -- > > > > 2.14.3 > > > > > > > > > > -- > > Cheers, > > Lyude Paul > > -- Cheers, Lyude Paul