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[209.132.180.67]) by mx.google.com with ESMTP id j8-v6si7612751pli.9.2018.04.05.11.37.13; Thu, 05 Apr 2018 11:37:27 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751934AbeDESgI (ORCPT + 99 others); Thu, 5 Apr 2018 14:36:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:55960 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751705AbeDESgG (ORCPT ); Thu, 5 Apr 2018 14:36:06 -0400 Received: from mail-qk0-f175.google.com (mail-qk0-f175.google.com [209.85.220.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 86040217D7; Thu, 5 Apr 2018 18:36:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 86040217D7 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=atull@kernel.org Received: by mail-qk0-f175.google.com with SMTP id o205so27401441qke.3; Thu, 05 Apr 2018 11:36:05 -0700 (PDT) X-Gm-Message-State: ALQs6tBU2g07I88s8jANu/7wmAHWAxJfcz3aPuvZNzcm8Fb9xJdyRtOH r7YA+SRn/jcjCk31GmIGfGuVM8UXiLZEGf199hE= X-Received: by 10.233.239.71 with SMTP id d68mr32867606qkg.100.1522953364637; Thu, 05 Apr 2018 11:36:04 -0700 (PDT) MIME-Version: 1.0 Received: by 10.200.27.18 with HTTP; Thu, 5 Apr 2018 11:35:24 -0700 (PDT) In-Reply-To: <1518513893-4719-11-git-send-email-hao.wu@intel.com> References: <1518513893-4719-1-git-send-email-hao.wu@intel.com> <1518513893-4719-11-git-send-email-hao.wu@intel.com> From: Alan Tull Date: Thu, 5 Apr 2018 13:35:24 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 10/24] fpga: dfl: add FPGA Management Engine driver basic framework To: Wu Hao Cc: Moritz Fischer , linux-fpga@vger.kernel.org, linux-kernel , linux-api@vger.kernel.org, "Kang, Luwei" , "Zhang, Yi Z" , Tim Whisonant , Enno Luebbers , Shiva Rao , Christopher Rauer , Xiao Guangrong Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao wrote: Hi Hao, > From: Kang Luwei > > The FPGA Management Engine (FME) provides power, thermal management, > performance counters, partial reconfiguration and other functions. For each > function, it is packaged into a private feature linked to the FME feature > device in the 'Device Feature List'. It's a platform device created by > DFL framework. > > This patch adds the basic framework of FME platform driver. It defines > sub feature drivers to handle the different sub features, including init, > uinit and ioctl. It also registers the file operations for the device file. > > Signed-off-by: Tim Whisonant > Signed-off-by: Enno Luebbers > Signed-off-by: Shiva Rao > Signed-off-by: Christopher Rauer > Signed-off-by: Kang Luwei > Signed-off-by: Xiao Guangrong > Signed-off-by: Wu Hao > --- > v3: rename driver from intel-fpga-fme to dfl-fme > rename Kconfig from INTEL_FPGA_FME to FPGA_DFL_FME > v4: fix SPDX license issue, use dfl-fme as module name > --- > drivers/fpga/Kconfig | 10 +++ > drivers/fpga/Makefile | 3 + > drivers/fpga/dfl-fme-main.c | 158 ++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 171 insertions(+) > create mode 100644 drivers/fpga/dfl-fme-main.c > > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig > index 87f3d44..103d5e2 100644 > --- a/drivers/fpga/Kconfig > +++ b/drivers/fpga/Kconfig > @@ -140,6 +140,16 @@ config FPGA_DFL > Gate Array (FPGA) solutions which implement Device Feature List. > It provides enumeration APIs, and feature device infrastructure. > > +config FPGA_DFL_FME > + tristate "FPGA DFL FME Driver" > + depends on FPGA_DFL > + help > + The FPGA Management Engine (FME) is a feature device implemented > + under Device Feature List (DFL) framework. Select this option to > + enable the platform device driver for FME which implements all > + FPGA platform level management features. There shall be 1 FME > + per DFL based FPGA device. > + > config FPGA_DFL_PCI > tristate "FPGA Device Feature List (DFL) PCIe Device Driver" > depends on PCI && FPGA_DFL > diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile > index 4375630..fbd1c85 100644 > --- a/drivers/fpga/Makefile > +++ b/drivers/fpga/Makefile > @@ -30,6 +30,9 @@ obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o > > # FPGA Device Feature List Support > obj-$(CONFIG_FPGA_DFL) += dfl.o > +obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o > + > +dfl-fme-objs := dfl-fme-main.o > > # Drivers for FPGAs which implement DFL > obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o > diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c > new file mode 100644 > index 0000000..ebe6b52 > --- /dev/null > +++ b/drivers/fpga/dfl-fme-main.c > @@ -0,0 +1,158 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Driver for FPGA Management Engine (FME) > + * > + * Copyright (C) 2017 Intel Corporation, Inc. > + * > + * Authors: > + * Kang Luwei > + * Xiao Guangrong > + * Joseph Grecco > + * Enno Luebbers > + * Tim Whisonant > + * Ananda Ravuri > + * Henry Mitchel > + */ > + > +#include > +#include > + > +#include "dfl.h" > + > +static int fme_hdr_init(struct platform_device *pdev, struct feature *feature) > +{ > + dev_dbg(&pdev->dev, "FME HDR Init.\n"); > + > + return 0; > +} > + > +static void fme_hdr_uinit(struct platform_device *pdev, struct feature *feature) > +{ > + dev_dbg(&pdev->dev, "FME HDR UInit.\n"); > +} > + > +static const struct feature_ops fme_hdr_ops = { > + .init = fme_hdr_init, > + .uinit = fme_hdr_uinit, > +}; > + > +static struct feature_driver fme_feature_drvs[] = { > + { > + .id = FME_FEATURE_ID_HEADER, > + .ops = &fme_hdr_ops, > + }, > + { > + .ops = NULL, > + }, > +}; > + > +static int fme_open(struct inode *inode, struct file *filp) > +{ > + struct platform_device *fdev = fpga_inode_to_feature_dev(inode); > + struct feature_platform_data *pdata = dev_get_platdata(&fdev->dev); > + int ret; > + > + if (WARN_ON(!pdata)) > + return -ENODEV; > + > + ret = feature_dev_use_begin(pdata); > + if (ret) > + return ret; > + > + dev_dbg(&fdev->dev, "Device File Open\n"); > + filp->private_data = pdata; > + > + return 0; > +} > + > +static int fme_release(struct inode *inode, struct file *filp) > +{ > + struct feature_platform_data *pdata = filp->private_data; > + struct platform_device *pdev = pdata->dev; > + > + dev_dbg(&pdev->dev, "Device File Release\n"); > + feature_dev_use_end(pdata); > + > + return 0; > +} > + > +static long fme_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) > +{ > + struct feature_platform_data *pdata = filp->private_data; > + struct platform_device *pdev = pdata->dev; > + struct feature *f; > + long ret; > + > + dev_dbg(&pdev->dev, "%s cmd 0x%x\n", __func__, cmd); > + > + switch (cmd) { > + default: > + /* > + * Let sub-feature's ioctl function to handle the cmd > + * Sub-feature's ioctl returns -ENODEV when cmd is not > + * handled in this sub feature, and returns 0 and other > + * error code if cmd is handled. > + */ > + fpga_dev_for_each_feature(pdata, f) { > + if (f->ops && f->ops->ioctl) { > + ret = f->ops->ioctl(pdev, f, cmd, arg); > + if (ret == -ENODEV) > + continue; > + else > + return ret; continue and else aren't needed. Could be if (ret != -ENODEV) return ret; Alan > + } > + } > + } > + > + return -EINVAL; > +} > + > +static const struct file_operations fme_fops = { > + .owner = THIS_MODULE, > + .open = fme_open, > + .release = fme_release, > + .unlocked_ioctl = fme_ioctl, > +}; > + > +static int fme_probe(struct platform_device *pdev) > +{ > + int ret; > + > + ret = fpga_dev_feature_init(pdev, fme_feature_drvs); > + if (ret) > + goto exit; > + > + ret = fpga_register_dev_ops(pdev, &fme_fops, THIS_MODULE); > + if (ret) > + goto feature_uinit; > + > + return 0; > + > +feature_uinit: > + fpga_dev_feature_uinit(pdev); > +exit: > + return ret; > +} > + > +static int fme_remove(struct platform_device *pdev) > +{ > + fpga_dev_feature_uinit(pdev); > + fpga_unregister_dev_ops(pdev); > + > + return 0; > +} > + > +static struct platform_driver fme_driver = { > + .driver = { > + .name = FPGA_FEATURE_DEV_FME, > + }, > + .probe = fme_probe, > + .remove = fme_remove, > +}; > + > +module_platform_driver(fme_driver); > + > +MODULE_DESCRIPTION("FPGA Management Engine driver"); > +MODULE_AUTHOR("Intel Corporation"); > +MODULE_LICENSE("GPL v2"); > +MODULE_ALIAS("platform:dfl-fme"); > -- > 2.7.4 >