Received: by 10.213.65.68 with SMTP id h4csp2361527imn; Thu, 5 Apr 2018 13:37:51 -0700 (PDT) X-Google-Smtp-Source: AIpwx48V+6S+/CY5KG4gtGiW85H+jG2nU9KhqecsHdlIRxdkifLq8BU51YRX3TJ1o9zztUco92BR X-Received: by 10.98.66.203 with SMTP id h72mr18189342pfd.156.1522960671129; Thu, 05 Apr 2018 13:37:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1522960671; cv=none; d=google.com; s=arc-20160816; b=xnuzlD0XcUAMDIheZIzTEQ4fGF1f+6STF+MjVStPK1ENpe2AzDjN8RjjFHxty/kjUy arCMKM7l37QIJH+eTxMVpm/eOb8edmRRgdyiv7bafPf6MD+lQ6rW7Clm9MUEpUO8WRBb S1Y0Mslb+5Qw44L/PVo1xKffAaZSe6w68l1/X0yJAbab4zA+AgJVCNTvlguu19TfcgC2 iFCNvsud288ds8WdzdVxm/GQZRbsEM/f1EfyOpHtAPXQnRYRW3rUwT/5RX8bDtHR/vmJ OVBEyrKLtfYkGiEf3mXx3VvybstfsFZ6SamHySK4BeXWcXMw68261mFRpwTpgasCuX+f Y3TA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:arc-authentication-results; bh=xPQvpSvRzR4rx9Yy15BT6WiP8cbMc5gxPS2sjzbit6k=; b=HgbsgSpOHIujxvVZXNKcsM3yIBDfn3nYzILi0Bl5fm9IPjOWfptxtoIJ2YYytuYMNc ZXBbSu7ov7wbsq2jF4W/GF4TQN5anareecH5X/jz2MMdtTml54Ed2NvVKnKCu9LvzA5G Jnt9HKiJjoEUfrwjCFxys/NSsSqTfAvkMT3LpedSVLS/1b0t7soxX5WZKkF5rnsnm+mg +TS6tzH4Pt1DmfN2/6/gGEh/cC7xYKfcgV2zUr6t/6NMXHf/I1E/xHk0JS0K3VQ9rQLu j/pPwMenU9Ddo0S+EgulgV4t5ZkrctBXXubjBUn7XwGdEKQN5c8X//Ts1Q6Hbm2IUskk XTqg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v1-v6si6295486ply.523.2018.04.05.13.37.37; Thu, 05 Apr 2018 13:37:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753468AbeDEUgN (ORCPT + 99 others); Thu, 5 Apr 2018 16:36:13 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:46662 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751344AbeDEUgK (ORCPT ); Thu, 5 Apr 2018 16:36:10 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 66A80406E8B9; Thu, 5 Apr 2018 20:36:09 +0000 (UTC) Received: from malachite.bss.redhat.com (dhcp-10-20-1-55.bss.redhat.com [10.20.1.55]) by smtp.corp.redhat.com (Postfix) with ESMTP id 78CD510B00B6; Thu, 5 Apr 2018 20:36:06 +0000 (UTC) From: Lyude Paul To: intel-gfx@lists.freedesktop.org Cc: Dhinakaran Pandiyan , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Laura Abbott , stable@vger.kernel.org, Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] drm/i915/dp: Send DPCD ON for MST before phy_up Date: Thu, 5 Apr 2018 16:36:01 -0400 Message-Id: <20180405203601.23242-1-lyude@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 2.78 on 10.11.54.3 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); Thu, 05 Apr 2018 20:36:09 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); Thu, 05 Apr 2018 20:36:09 +0000 (UTC) for IP:'10.11.54.3' DOMAIN:'int-mx03.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'lyude@redhat.com' RCPT:'' Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When doing a modeset where the sink is transitioning from D3 to D0 , it would sometimes be possible for the initial power_up_phy() to start timing out. This would only be observed in the last action before the sink went into D3 mode was intel_dp_sink_dpms(DRM_MODE_DPMS_OFF). We originally thought this might be an issue with us accidentally shutting off the aux block when putting the sink into D3, but since the DP spec mandates that sinks must wake up within 1ms while we have 100ms to respond to an ESI irq, this didn't really add up. Turns out that the problem is more subtle then that: It turns out that the timeout is from us not enabling DPMS on the MST hub before actually trying to initiate sideband communications. This would cause the first sideband communication (power_up_phy()), to start timing out because the sink wasn't ready to respond. Afterwards, we would call intel_dp_sink_dpms(DRM_MODE_DPMS_ON) in intel_ddi_pre_enable_dp(), which would actually result in waking up the sink so that sideband requests would work again. Since DPMS is what lets us actually bring the hub up into a state where sideband communications become functional again, we just need to make sure to enable DPMS on the display before attempting to perform sideband communications. Changes since v1: - Remove comment above if (!intel_dp->is_mst) - vsryjala - Move intel_dp_sink_dpms() for MST into intel_dp_post_disable_mst() to keep enable/disable paths symmetrical - Improve commit message - dhnkrn Signed-off-by: Lyude Paul Cc: Dhinakaran Pandiyan Cc: Ville Syrjälä Cc: Laura Abbott Cc: stable@vger.kernel.org Fixes: ad260ab32a4d9 ("drm/i915/dp: Write to SET_POWER dpcd to enable MST hub.") --- This email should hopefully actually be picked up by patchwork this time, hooray! drivers/gpu/drm/i915/intel_ddi.c | 6 ++++-- drivers/gpu/drm/i915/intel_dp_mst.c | 2 ++ 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index a6672a9abd85..c0bf7419e1c1 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2324,7 +2324,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, intel_prepare_dp_ddi_buffers(encoder, crtc_state); intel_ddi_init_dp_buf_reg(encoder); - intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); + if (!intel_dp->is_mst) + intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); intel_dp_start_link_train(intel_dp); if (port != PORT_A || INTEL_GEN(dev_priv) >= 9) intel_dp_stop_link_train(intel_dp); @@ -2427,7 +2428,8 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder, * Power down sink before disabling the port, otherwise we end * up getting interrupts from the sink on detecting link loss. */ - intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); + if (!intel_dp->is_mst) + intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); intel_disable_ddi_buf(encoder); diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index c3de0918ee13..2493bd1e0e59 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -176,6 +176,7 @@ static void intel_mst_post_disable_dp(struct intel_encoder *encoder, */ drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, false); + intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); intel_dp->active_mst_links--; @@ -223,6 +224,7 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder, DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links); + intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true); if (intel_dp->active_mst_links == 0) intel_dig_port->base.pre_enable(&intel_dig_port->base, -- 2.14.3