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[209.132.180.67]) by mx.google.com with ESMTP id a2si960290pgc.18.2018.04.06.03.21.06; Fri, 06 Apr 2018 03:21:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=OqZuEmaq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752126AbeDFKTx (ORCPT + 99 others); Fri, 6 Apr 2018 06:19:53 -0400 Received: from mail-qt0-f196.google.com ([209.85.216.196]:35322 "EHLO mail-qt0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751705AbeDFKTu (ORCPT ); Fri, 6 Apr 2018 06:19:50 -0400 Received: by mail-qt0-f196.google.com with SMTP id s2so568344qti.2; Fri, 06 Apr 2018 03:19:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=qns0l0ZoVQrHOc4L7dC2qAlKFM91iKfse1/iGS3obNk=; b=OqZuEmaqbELzZ0+fkMJJmHva2IAKz9ABX7m+1mVtezS+LzFoKuu72tnCncZueP3dM8 FXDIYRIeeLINkeVT4ZzsLw2ife+2OjiXkdoDwwLcS19hJtk6+0K9S9FbTQmPnO++jYkW voqRwSXPyqoDCkjHS4msXTZbKVBIRGy9l/3ygNe1T9AR4Hl/TO+IObC554IQMiy8xNhl LkSKggVh2m6l9UbcCYdwIE1WBPykl8G8uupITMhGaBoqHYj8wyQp/WaQZt5fLAXxpg3i SHuwsNVFSU8HdHalGif85pX5Z7Q8E77H3PRHdB0sAb4gPpRsZCkmlEw6aeRlCazj6+gC APUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=qns0l0ZoVQrHOc4L7dC2qAlKFM91iKfse1/iGS3obNk=; b=r/TPsXJwCDGwjYxkXOJg3vopwxD7FRSaFB665Do2eXtUx3y/VdsXs5mVwNY5pX+olm YujFICgRrUS7oxopKMX+ESK/rs2F94iA0zazAv4UCB6CaEaYwMfsf3/f9ysYld92mLyS CPYrDSYIbwZplYWjUi2QxxkJI5cz6jfH8gIKTpvGCCAx7R7SGgoO0VSMfETLcq0I6wY7 8FbjrY78KyGwLhSLy5eMg/liDMDVIEGqlm3eUmBB3ahClaoXhzjA0jfN4dkLrpij/hH5 4n81+9kl2vRvSmWp1VAQG70w4K3QFRUOJbUj+xxeSM9BECcoIV7gxH7lM7Cypd/pT68Q qz4w== X-Gm-Message-State: ALQs6tBh3YKX6HXmTgX/Y+5x/J1OGT3CShr7f/3w+NfKNVWCSO36csE5 ybBSs0d/tcNOsW/ErgAXRf/J/3NKoGg6w2tO8yA= X-Received: by 10.200.47.26 with SMTP id j26mr36940875qta.185.1523009989914; Fri, 06 Apr 2018 03:19:49 -0700 (PDT) MIME-Version: 1.0 Received: by 10.12.185.25 with HTTP; Fri, 6 Apr 2018 03:19:49 -0700 (PDT) In-Reply-To: <1522933753-19589-1-git-send-email-okaya@codeaurora.org> References: <1522933753-19589-1-git-send-email-okaya@codeaurora.org> From: Arnd Bergmann Date: Fri, 6 Apr 2018 12:19:49 +0200 X-Google-Sender-Auth: z7uBeRwvfKtSF_xTqcT2jvXSGW0 Message-ID: Subject: Re: [PATCH v4 1/5] io: define several IO & PIO barrier types for the asm-generic version To: Sinan Kaya Cc: Timur Tabi , sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org, Linux ARM , linux-arch , Linux Kernel Mailing List , linux-s390 , Martin Schwidefsky , Heiko Carstens , Ley Foon Tan , "moderated list:NIOS2 ARCHITECTURE" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 5, 2018 at 3:09 PM, Sinan Kaya wrote: > Getting ready to harden readX()/writeX() and inX()/outX() semantics for the > generic implementation. > > Defining two set of macros as __io_br() and __io_ar() to indicate actions > to be taken before and after MMIO read. > > Defining two set of macros as __io_bw() and __io_aw() to indicate actions > to be taken before and after MMIO write. > > Defining two set of macros as __io_pbw() and __io_paw() to indicate actions > to be taken before and after Port IO write. > > Defining two set of macros as __io_pbr() and __io_par() to indicate actions > to be taken before and after Port IO read. > > If rmb() is available for the architecture, prefer rmb() as the default > implementation of __io_ar()/__io_par(). > > If wmb() is available for the architecture, prefer wmb() as the default > implementation of __io_bw()/__io_pbw(). > > Signed-off-by: Sinan Kaya I've applied the series to my asm-generic tree now, I will give it a few days in linux-next to see if any obvious regressions happen, and then send a pull request. Checking the list of architectures that are affected by this, I see h8300, microblaze, nios2, openrisc, s390, sparc, um, unicore32, and xtensa, all of which use asm-generic/io.h without overriding the default readl/writel. I would guess that at least s390 doesn't need the barriers (maintainers on Cc now), but there may be others that want to override the new barriers with weaker ones where an MMIO access is guaranteed to serialize against DMA, or where a specialized barrier for this case exists. Looking over the asm-generic implementation once more now, I wonder if we should change the relaxed accessors to not have any barriers (back to the version before your series) rather than defaulting them to having the same barriers as the regular readl/writel. Arnd