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[209.132.180.67]) by mx.google.com with ESMTP id g24si8034784pfe.263.2018.04.06.06.24.16; Fri, 06 Apr 2018 06:24:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PYzMIhxY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753090AbeDFNXA (ORCPT + 99 others); Fri, 6 Apr 2018 09:23:00 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:40038 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752412AbeDFNW7 (ORCPT ); Fri, 6 Apr 2018 09:22:59 -0400 Received: by mail-wr0-f196.google.com with SMTP id n2so1757665wrj.7 for ; Fri, 06 Apr 2018 06:22:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=r/2MflzyOcAVSGq7YUeMFkzLCHLllalex77XQCsWiJ8=; b=PYzMIhxYMb5JpduokoD7ucZi7AomnBchQCUtbgr6T+MCvog70MH0D78ZYFG8pfv9Jd IUBdMb+w0UGO1G1M2DEF7kGn0wtzbb2hIAPjchRighlud9cLvXe9/wynENZ2GOmuIR08 AoREJrPeXZdA+Kl7ZglrVO4GD6O+XG0fkP5N4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=r/2MflzyOcAVSGq7YUeMFkzLCHLllalex77XQCsWiJ8=; b=noivuzqKgIdgot/b1oNfW4yMeK+Vh1ofLEh6PDQdZ0MNrFbD3MimwmJ6fSE0yuJ09N tSUORFQ+QsK9qBGhXHgZY6hTi4vHMPOevqtAQI6oyl7/kLZZqsO8jJHsJtIn58wglkAF SwrjVwMwQk/d5s86fD+/5t44MoiE/jj4x+PczOu3GjKuPbBv1YZSJiERVEQeSvIGLx7w WhxhpPjaXflrC6Zr+YquziARpsn1ola2wfXe4ktXVt0ytJeme21BIlA5xSHlLtC74Pya c012HXWOStnpeVLiPfB7vZFFWTLUToFXX1omc9KOF5fw9kyo6hzkFTHjxYV06WP0CMJL 0fpQ== X-Gm-Message-State: AElRT7G6xI+dUe+O8zw3AgM3e4ebxKjRLvhL6Wu7FYik81u46iFT0tav 2H45xjjckzOiJNWMgJM8VYlqFw== X-Received: by 10.223.171.164 with SMTP id s33mr20639547wrc.181.1523020978665; Fri, 06 Apr 2018 06:22:58 -0700 (PDT) Received: from andrea ([213.209.242.222]) by smtp.gmail.com with ESMTPSA id j17sm803904wmc.26.2018.04.06.06.22.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 Apr 2018 06:22:57 -0700 (PDT) Date: Fri, 6 Apr 2018 15:22:49 +0200 From: Andrea Parri To: Will Deacon Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, peterz@infradead.org, mingo@kernel.org, boqun.feng@gmail.com, paulmck@linux.vnet.ibm.com, catalin.marinas@arm.com Subject: Re: [PATCH 00/10] kernel/locking: qspinlock improvements Message-ID: <20180406132249.GA7071@andrea> References: <1522947547-24081-1-git-send-email-will.deacon@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1522947547-24081-1-git-send-email-will.deacon@arm.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 05, 2018 at 05:58:57PM +0100, Will Deacon wrote: > Hi all, > > I've been kicking the tyres further on qspinlock and with this set of patches > I'm happy with the performance and fairness properties. In particular, the > locking algorithm now guarantees forward progress whereas the implementation > in mainline can starve threads indefinitely in cmpxchg loops. > > Catalin has also implemented a model of this using TLA to prove that the > lock is fair, although this doesn't take the memory model into account: > > https://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/kernel-tla.git/commit/ Nice! I'll dig into this formalization, but my guess is that our model (and axiomatic models "a-la-herd", in general) are not well-suited when it comes to study properties such as fairness, liveness... Did you already think about this? Andrea > > I'd still like to get more benchmark numbers and wider exposure before > enabling this for arm64, but my current testing is looking very promising. > This series, along with the arm64-specific patches, is available at: > > https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=qspinlock > > Cheers, > > Will > > --->8 > > Jason Low (1): > locking/mcs: Use smp_cond_load_acquire() in mcs spin loop > > Will Deacon (9): > locking/qspinlock: Don't spin on pending->locked transition in > slowpath > locking/qspinlock: Remove unbounded cmpxchg loop from locking slowpath > locking/qspinlock: Kill cmpxchg loop when claiming lock from head of > queue > locking/qspinlock: Use atomic_cond_read_acquire > barriers: Introduce smp_cond_load_relaxed and atomic_cond_read_relaxed > locking/qspinlock: Use smp_cond_load_relaxed to wait for next node > locking/qspinlock: Merge struct __qspinlock into struct qspinlock > locking/qspinlock: Make queued_spin_unlock use smp_store_release > locking/qspinlock: Elide back-to-back RELEASE operations with > smp_wmb() > > arch/x86/include/asm/qspinlock.h | 19 ++- > arch/x86/include/asm/qspinlock_paravirt.h | 3 +- > include/asm-generic/barrier.h | 27 ++++- > include/asm-generic/qspinlock.h | 2 +- > include/asm-generic/qspinlock_types.h | 32 ++++- > include/linux/atomic.h | 2 + > kernel/locking/mcs_spinlock.h | 10 +- > kernel/locking/qspinlock.c | 191 ++++++++++-------------------- > kernel/locking/qspinlock_paravirt.h | 34 ++---- > 9 files changed, 141 insertions(+), 179 deletions(-) > > -- > 2.1.4 >