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[209.132.180.67]) by mx.google.com with ESMTP id z2si9649841pgz.328.2018.04.08.04.31.48; Sun, 08 Apr 2018 04:32:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=yXuEXlhr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752941AbeDHJ6R (ORCPT + 99 others); Sun, 8 Apr 2018 05:58:17 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:49177 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752061AbeDHJ6K (ORCPT ); Sun, 8 Apr 2018 05:58:10 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w389vteE001548; Sun, 8 Apr 2018 04:57:55 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1523181475; bh=Zqo8JZ3cNTSoZC2+R84BiwOmeCpXIyTH6BWiEuT7kaM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yXuEXlhrW61LpNhgexEKV2AbZ6y1JxpQHLJS8K5uBflBN9dPeNVuETFaaKX2sXlOr lFd+0rhCrCtwDmmTyvbYjDGbL81xZ1dEod14YodEsVyKxELGhPuETt0CWZfW3pKlJp 5f8oI66xRshitYnk9JABNrsMTYCK6rduC4xSIGzQ= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w389vsJE013241; Sun, 8 Apr 2018 04:57:55 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Sun, 8 Apr 2018 04:57:54 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Sun, 8 Apr 2018 04:57:54 -0500 Received: from a0230074-OptiPlex-7010.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w389vfPn032344; Sun, 8 Apr 2018 04:57:51 -0500 From: Faiz Abbas To: , , CC: , , , , , , , Subject: [PATCH 3/3] ARM: dts: dra76x: Add MCAN node Date: Sun, 8 Apr 2018 15:29:02 +0530 Message-ID: <1523181542-3770-4-git-send-email-faiz_abbas@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523181542-3770-1-git-send-email-faiz_abbas@ti.com> References: <1523181542-3770-1-git-send-email-faiz_abbas@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Franklin S Cooper Jr Add support for the MCAN peripheral which supports both classic CAN messages along with the new CAN-FD message. Add MCAN node to evm and enable it with a maximum datarate of 5 mbps Signed-off-by: Franklin S Cooper Jr Signed-off-by: Sekhar Nori Signed-off-by: Faiz Abbas --- arch/arm/boot/dts/dra76-evm.dts | 7 +++++++ arch/arm/boot/dts/dra76x.dtsi | 17 +++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/dra76-evm.dts b/arch/arm/boot/dts/dra76-evm.dts index 2deb964..2777652 100644 --- a/arch/arm/boot/dts/dra76-evm.dts +++ b/arch/arm/boot/dts/dra76-evm.dts @@ -404,3 +404,10 @@ phys = <&pcie1_phy>, <&pcie2_phy>; phy-names = "pcie-phy0", "pcie-phy1"; }; + +&m_can0 { + status = "okay"; + can-transceiver { + max-bitrate = <5000000>; + }; +}; diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi index bfc8263..71bd2a2 100644 --- a/arch/arm/boot/dts/dra76x.dtsi +++ b/arch/arm/boot/dts/dra76x.dtsi @@ -11,6 +11,23 @@ / { compatible = "ti,dra762", "ti,dra7"; + ocp { + m_can0: mcan@42C01A00 { + compatible = "bosch,m_can"; + reg = <0x42C01A00 0x4000>, <0x42C00000 0x18FC>; + reg-names = "m_can", "message_ram"; + interrupt-parent = <&gic>; + interrupts = , + ; + interrupt-names = "int0", "int1"; + ti,hwmods = "mcan"; + clocks = <&mcan_clk>, <&l3_iclk_div>; + clock-names = "cclk", "hclk"; + bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; + status = "disabled"; + }; + }; + }; /* MCAN interrupts are hard-wired to irqs 67, 68 */ -- 2.7.4