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received-spf: None (protection.outlook.com: microsoft.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: OKtwy7+wgsQQBig10Eld8k/gPa1D/iUB8Upj4ah9AD5o1tzSC2LCOUJlY/LkxrlzUBJF5txm75zx91cDNKTcsxf+UPPXvOe7sCYkfuBx1oeqJmxqZzqZQtvxjjuJeQ58pNEX6wkzGuzYeRRr7VqscGBH1r3acRBBCoVoQmRigh8YE94KSfyZV5HCXmm9/368fj9BUece9T88sTt8pCI1grLEaGScEMFTFYBEViewgBrNTRrmSR2IaXq+xCYOsplmIdMt15lLp2TwHzlOLAXIZCIVt4Vo+l4hH8B+NSmVIMqq/T45811zvqPd+AFKfd+X0x3j6JcKJJR7SqgF4EtAtdtGUPkdtD5uChIDfko7u/lIGf0Cs6WnEjSLZv0leoMGSrLNL9QZQwNYQSejNPAh4di0SAgltI1JbdJhlXKKntk= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1f3f54cd-fae8-40db-6ed9-08d59db14f4d X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Apr 2018 00:25:23.8314 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR2101MB0870 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Adrian Hunter [ Upstream commit 38b65b0891dc129dc0a5ce148a21c481e667b395 ] CBR (core-to-bus ratio) packets provide an indication of CPU frequency. A more accurate measure can be made by counting the cycles (given by CYC packets) in between other timing packets (either MTC or TSC). Using TSC packets has at least 2 issues: 1) timing might have stopped (e.g. mwait) or 2) TSC packets within PSB+ might slip past CYC packets. For now, simply do not use TSC packets for calculating CPU cycles to TSC. That leaves the case where 2 MTC packets are used, otherwise falling back to the CBR value. Signed-off-by: Adrian Hunter Cc: Andi Kleen Link: http://lkml.kernel.org/r/1495786658-18063-37-git-send-email-adrian.hu= nter@intel.com Signed-off-by: Arnaldo Carvalho de Melo Signed-off-by: Sasha Levin --- tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/pe= rf/util/intel-pt-decoder/intel-pt-decoder.c index 7e27207d0f45..3964b1fe3605 100644 --- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c +++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c @@ -698,6 +698,12 @@ static int intel_pt_calc_cyc_cb(struct intel_pt_pkt_in= fo *pkt_info) break; =20 case INTEL_PT_TSC: + /* + * For now, do not support using TSC packets - refer + * intel_pt_calc_cyc_to_tsc(). + */ + if (data->from_mtc) + return 1; timestamp =3D pkt_info->packet.payload | (data->timestamp & (0xffULL << 56)); if (data->from_mtc && timestamp < data->timestamp && @@ -810,6 +816,14 @@ static void intel_pt_calc_cyc_to_tsc(struct intel_pt_d= ecoder *decoder, .cbr_cyc_to_tsc =3D 0, }; =20 + /* + * For now, do not support using TSC packets for at least the reasons: + * 1) timing might have stopped + * 2) TSC packets within PSB+ can slip against CYC packets + */ + if (!from_mtc) + return; + intel_pt_pkt_lookahead(decoder, intel_pt_calc_cyc_cb, &data); } =20 --=20 2.15.1