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received-spf: None (protection.outlook.com: microsoft.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: gi1HK8peemixQGzhezBt/2aGKYf6Up6P7VNurLe6GLNsEa3s5oHxTTixILIoFL97hU2/A1JiJDltqxamC5A8CqRRcgbRyw4oqcSnmkYOBiC7ie96vLXS82m4omkSUKjtp7Q9UvG64ViT9GexM+utLjs5i3xQU4YznmgDhwRyglT/FKHW7RC1zhEsg+DdLblHHCkTFZD7RaRpOohjYdPfkKJC6DrVQRqelcCO3tfOnbhZyW6PxQ+A2V4cZo5OyBufyK4oIpZYiAu6fqyqmq0YkRXvgT2ttFRbk3Md/8OIaUDg0hdNv3jasPKMkweYggSRqBjmjf8x5l6XlZLnajDHntKSuPxKQoxB5xopZmDF/ihM2j7GRFhxixMYcsXDAuxwtQ6weqMZvQG6hnxEfGZYgEJ6yyUdM1Gr6OybyFaNV60= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: 89bd07e5-c787-4a5c-354f-08d59db0c5c8 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Apr 2018 00:23:45.1280 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR2101MB0871 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jean-Baptiste Maneyrol [ Upstream commit 881b556f6cf22d37be9340f293f2db10ce7ae8bf ] SPI bus is never generating error during transfer, so to check if a chip is correctly connected on a SPI bus we enforce whoami check to be correct. In this way we can assure SPI probe is failing if there is no chip connected. Note that this is really papering over boards that claim the device is there when it isn't. Not a bad thing to cope with, but not necessarily stable material. Fixes: cec0154556f8 ("iio: inv_mpu6050: Check WHO_AM_I register on probe") Signed-off-by: Jean-Baptiste Maneyrol Signed-off-by: Jonathan Cameron Signed-off-by: Sasha Levin --- drivers/iio/imu/inv_mpu6050/inv_mpu_core.c | 33 ++++++++++++++++++++++----= ---- 1 file changed, 24 insertions(+), 9 deletions(-) diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/i= nv_mpu6050/inv_mpu_core.c index 5faea370ab57..41c68d4a3f6b 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c @@ -797,27 +797,42 @@ static int inv_check_and_setup_chip(struct inv_mpu605= 0_state *st) { int result; unsigned int regval; + int i; =20 st->hw =3D &hw_info[st->chip_type]; st->reg =3D hw_info[st->chip_type].reg; =20 - /* reset to make sure previous state are not there */ - result =3D regmap_write(st->map, st->reg->pwr_mgmt_1, - INV_MPU6050_BIT_H_RESET); - if (result) - return result; - msleep(INV_MPU6050_POWER_UP_TIME); - /* check chip self-identification */ result =3D regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); if (result) return result; if (regval !=3D st->hw->whoami) { - dev_warn(regmap_get_device(st->map), - "whoami mismatch got %#02x expected %#02hhx for %s\n", + /* check whoami against all possible values */ + for (i =3D 0; i < INV_NUM_PARTS; ++i) { + if (regval =3D=3D hw_info[i].whoami) { + dev_warn(regmap_get_device(st->map), + "whoami mismatch got %#02x (%s)" + "expected %#02hhx (%s)\n", + regval, hw_info[i].name, + st->hw->whoami, st->hw->name); + break; + } + } + if (i >=3D INV_NUM_PARTS) { + dev_err(regmap_get_device(st->map), + "invalid whoami %#02x expected %#02hhx (%s)\n", regval, st->hw->whoami, st->hw->name); + return -ENODEV; + } } =20 + /* reset to make sure previous state are not there */ + result =3D regmap_write(st->map, st->reg->pwr_mgmt_1, + INV_MPU6050_BIT_H_RESET); + if (result) + return result; + msleep(INV_MPU6050_POWER_UP_TIME); + /* * toggle power state. After reset, the sleep bit could be on * or off depending on the OTP settings. Toggling power would --=20 2.15.1