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[209.132.180.67]) by mx.google.com with ESMTP id b4si229999pgs.182.2018.04.12.02.44.14; Thu, 12 Apr 2018 02:44:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752954AbeDLJkV (ORCPT + 99 others); Thu, 12 Apr 2018 05:40:21 -0400 Received: from 9pmail.ess.barracuda.com ([64.235.154.210]:33405 "EHLO 9pmail.ess.barracuda.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752930AbeDLJkU (ORCPT ); Thu, 12 Apr 2018 05:40:20 -0400 Received: from MIPSMAIL01.mipstec.com (mailrelay.mips.com [12.201.5.28]) by mx1412.ess.rzc.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NO); Thu, 12 Apr 2018 09:39:54 +0000 Received: from mredfearn-linux.mipstec.com (192.168.155.41) by MIPSMAIL01.mipstec.com (10.20.43.31) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 12 Apr 2018 02:39:30 -0700 From: Matt Redfearn To: James Hogan , Ralf Baechle , Florian Fainelli CC: , Matt Redfearn , Namhyung Kim , Peter Zijlstra , , Ingo Molnar , Jiri Olsa , Alexander Shishkin , Arnaldo Carvalho de Melo Subject: [PATCH v2 5/6] MIPS: perf: Fold vpe_id() macro into it's one last usage Date: Thu, 12 Apr 2018 10:36:25 +0100 Message-ID: <1523525786-29153-6-git-send-email-matt.redfearn@mips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523525786-29153-1-git-send-email-matt.redfearn@mips.com> References: <1523525786-29153-1-git-send-email-matt.redfearn@mips.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.155.41] X-BESS-ID: 1523525812-452060-21719-24429-9 X-BESS-VER: 2018.4.1-r1804052329 X-BESS-Apparent-Source-IP: 12.201.5.28 X-BESS-Outbound-Spam-Score: 0.00 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.191914 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS59374 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The vpe_id() macro is now used only in mipsxx_pmu_enable_event when CONFIG_CPU_BMIPS5000 is defined. Fold the one used definition of the macro into it's usage and remove the now unused definitions. Since we know that cpu_has_mipsmt_pertccounters == 0 on BMIPS5000, remove the test on it and just set the counter to count the relevant VPE. Signed-off-by: Matt Redfearn --- Changes in v2: Since BMIPS5000 does not implement per TC counters, we can remove the check on cpu_has_mipsmt_pertccounters. arch/mips/kernel/perf_event_mipsxx.c | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index 6c9b5d64a9ef..389e346e9cf3 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c @@ -134,18 +134,6 @@ static int cpu_has_mipsmt_pertccounters; static DEFINE_SPINLOCK(core_counters_lock); static DEFINE_RWLOCK(pmuint_rwlock); - -#if defined(CONFIG_CPU_BMIPS5000) -#define vpe_id() (cpu_has_mipsmt_pertccounters ? \ - 0 : (smp_processor_id() & MIPS_CPUID_TO_COUNTER_MASK)) -#else -#define vpe_id() (cpu_has_mipsmt_pertccounters ? \ - 0 : cpu_vpe_id(¤t_cpu_data)) -#endif - -#else /* !CONFIG_MIPS_PERF_SHARED_TC_COUNTERS */ -#define vpe_id() 0 - #endif /* CONFIG_MIPS_PERF_SHARED_TC_COUNTERS */ static void resume_local_counters(void); @@ -381,8 +369,10 @@ static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx) #ifdef CONFIG_CPU_BMIPS5000 { /* enable the counter for the calling thread */ - cpuc->saved_ctrl[idx] |= - (1 << (12 + vpe_id())) | BRCM_PERFCTRL_TC; + unsigned int vpe_id; + + vpe_id = smp_processor_id() & MIPS_CPUID_TO_COUNTER_MASK; + cpuc->saved_ctrl[idx] |= BIT(12 + vpe_id) | BRCM_PERFCTRL_TC; } #else #ifdef CONFIG_MIPS_MT_SMP -- 2.7.4