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[209.132.180.67]) by mx.google.com with ESMTP id h1-v6si3088388pln.138.2018.04.12.03.20.49; Thu, 12 Apr 2018 03:21:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752598AbeDLKR7 (ORCPT + 99 others); Thu, 12 Apr 2018 06:17:59 -0400 Received: from foss.arm.com ([217.140.101.70]:58918 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751870AbeDLKR6 (ORCPT ); Thu, 12 Apr 2018 06:17:58 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 165B61529; Thu, 12 Apr 2018 03:17:58 -0700 (PDT) Received: from e110455-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DC5E53F24A; Thu, 12 Apr 2018 03:17:57 -0700 (PDT) Received: by e110455-lin.cambridge.arm.com (Postfix, from userid 1000) id 391F4680313; Thu, 12 Apr 2018 11:17:56 +0100 (BST) Date: Thu, 12 Apr 2018 11:17:56 +0100 From: Liviu Dudau To: Ayan Kumar Halder Cc: brian.starkey@arm.com, malidp@foss.arm.com, airlied@linux.ie, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, nd@arm.com Subject: Re: [PATCH] drm/arm/malidp: Preserve LAYER_FORMAT contents when setting format Message-ID: <20180412101756.GA14661@e110455-lin.cambridge.arm.com> References: <1523384703-17621-1-git-send-email-ayan.halder@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1523384703-17621-1-git-send-email-ayan.halder@arm.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Apr 10, 2018 at 07:25:03PM +0100, Ayan Kumar Halder wrote: > On some Mali-DP processors, the LAYER_FORMAT register contains fields > other than the format. These bits were unconditionally cleared when > setting the pixel format, whereas they should be preserved at their > reset values. > > Reported-by: Brian Starkey > Reported-by: Liviu Dudau > Signed-off-by: Ayan Kumar halder Acked-by: Liviu Dudau Thanks for catching this in testing! Best regards, Liviu > --- > drivers/gpu/drm/arm/malidp_planes.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c > index 7a44897..4af3c1f 100644 > --- a/drivers/gpu/drm/arm/malidp_planes.c > +++ b/drivers/gpu/drm/arm/malidp_planes.c > @@ -23,6 +23,7 @@ > > /* Layer specific register offsets */ > #define MALIDP_LAYER_FORMAT 0x000 > +#define LAYER_FORMAT_MASK 0x3f > #define MALIDP_LAYER_CONTROL 0x004 > #define LAYER_ENABLE (1 << 0) > #define LAYER_FLOWCFG_MASK 7 > @@ -337,7 +338,9 @@ static void malidp_de_plane_update(struct drm_plane *plane, > dest_w = plane->state->crtc_w; > dest_h = plane->state->crtc_h; > > - malidp_hw_write(mp->hwdev, ms->format, mp->layer->base); > + val = malidp_hw_read(mp->hwdev, mp->layer->base); > + val = (val & ~LAYER_FORMAT_MASK) | ms->format; > + malidp_hw_write(mp->hwdev, val, mp->layer->base); > > for (i = 0; i < ms->n_planes; i++) { > /* calculate the offset for the layer's plane registers */ > -- > 2.7.4 > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯