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[209.132.180.67]) by mx.google.com with ESMTP id s9-v6si11259513plr.493.2018.04.16.01.28.00; Mon, 16 Apr 2018 01:28:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ObB6kTOi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753788AbeDPISJ (ORCPT + 99 others); Mon, 16 Apr 2018 04:18:09 -0400 Received: from mail-ot0-f196.google.com ([74.125.82.196]:40238 "EHLO mail-ot0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751106AbeDPISI (ORCPT ); Mon, 16 Apr 2018 04:18:08 -0400 Received: by mail-ot0-f196.google.com with SMTP id h8-v6so5346704otj.7 for ; Mon, 16 Apr 2018 01:18:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=1RKaB/yYJQZTIwuqMy6l+rmlcCorkLE+XYnzRTzhPzA=; b=ObB6kTOieEpfnTklZuTanpK4dwVW4ziDAe/c8I0O7IxarShAnF+HkifaZlSCa7HJEJ wsqcC8BLvdKfbmKfMUCNXnMMJJeGMssDEjJDYIvA8pCy9WI/mOCK4YDTOOUJPIhc+4GD x/dp0A4CYkKiFo+YngaDNLHgvPGQb/mvQZ1aI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=1RKaB/yYJQZTIwuqMy6l+rmlcCorkLE+XYnzRTzhPzA=; b=fUfG1KpCOVA/04v3m43kuchTxiChME1tBIWbhbcL8v1oAwRRZQ9KM3Aw8gC7IHajPx NIQwDkSvmxlCrbio1r1r4xxUz15RulJ/gCskusKNy/3bA9bBFXLv44oTsKsDOV6d+UzQ /E679/+CoApqgr6th+Nkxtbl25Gnsj3DLZq8AMHXBTLzmfb0Cv2RMgKOCmq6s0iEN1Iy SKPurSixIKx1ctNEJ7HlivL46nWe5nUbm3Zd00v/rKQHCvjEiRxdEJE3j0rlTlWXyp9c kw1IXrKLtlPdoKFErG51tlKoTHGeohvE772UeHM37DOXvfMVhK0vd4eCQcslaZn2a1dP mysw== X-Gm-Message-State: ALQs6tANrm+rnUXN4/g1ZLpu6b6POIF2whIzBOrqa8UEzrGZKV11e/lH brJPl7MUUZ4kmAwSfKk2XXeI3HbnK54yUehRJ+OE/g== X-Received: by 2002:a9d:624d:: with SMTP id i13-v6mr10430638otk.26.1523866687404; Mon, 16 Apr 2018 01:18:07 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a9d:7081:0:0:0:0:0 with HTTP; Mon, 16 Apr 2018 01:18:06 -0700 (PDT) In-Reply-To: References: From: Baolin Wang Date: Mon, 16 Apr 2018 16:18:06 +0800 Message-ID: Subject: Re: [PATCH 1/2] gpio: eic: Add edge trigger emulation for EIC To: Linus Walleij Cc: Andy Shevchenko , Mark Brown , "open list:GPIO SUBSYSTEM" , LKML , Baolin Wang Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 30 March 2018 at 15:02, Baolin Wang wrote: > The Spreadtrum debounce EIC and latch EIC can not support edge trigger, > but most GPIO users (like gpio-key driver) only use the edge trigger, > thus the EIC driver need add some support to emulate the edge trigger > to satisfy this requirement. > > Signed-off-by: Baolin Wang Any comments for this patch set? Thanks. > --- > drivers/gpio/gpio-eic-sprd.c | 73 ++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > > diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c > index de7dd93..e0d6a0a 100644 > --- a/drivers/gpio/gpio-eic-sprd.c > +++ b/drivers/gpio/gpio-eic-sprd.c > @@ -300,6 +300,7 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) > struct gpio_chip *chip = irq_data_get_irq_chip_data(data); > struct sprd_eic *sprd_eic = gpiochip_get_data(chip); > u32 offset = irqd_to_hwirq(data); > + int state; > > switch (sprd_eic->type) { > case SPRD_EIC_DEBOUNCE: > @@ -310,6 +311,17 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) > case IRQ_TYPE_LEVEL_LOW: > sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 0); > break; > + case IRQ_TYPE_EDGE_RISING: > + case IRQ_TYPE_EDGE_FALLING: > + case IRQ_TYPE_EDGE_BOTH: > + state = sprd_eic_get(chip, offset); > + if (state) > + sprd_eic_update(chip, offset, > + SPRD_EIC_DBNC_IEV, 0); > + else > + sprd_eic_update(chip, offset, > + SPRD_EIC_DBNC_IEV, 1); > + break; > default: > return -ENOTSUPP; > } > @@ -324,6 +336,17 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) > case IRQ_TYPE_LEVEL_LOW: > sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 1); > break; > + case IRQ_TYPE_EDGE_RISING: > + case IRQ_TYPE_EDGE_FALLING: > + case IRQ_TYPE_EDGE_BOTH: > + state = sprd_eic_get(chip, offset); > + if (state) > + sprd_eic_update(chip, offset, > + SPRD_EIC_LATCH_INTPOL, 0); > + else > + sprd_eic_update(chip, offset, > + SPRD_EIC_LATCH_INTPOL, 1); > + break; > default: > return -ENOTSUPP; > } > @@ -405,6 +428,55 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) > return 0; > } > > +static void sprd_eic_toggle_trigger(struct gpio_chip *chip, unsigned int irq, > + unsigned int offset) > +{ > + struct sprd_eic *sprd_eic = gpiochip_get_data(chip); > + struct irq_data *data = irq_get_irq_data(irq); > + u32 trigger = irqd_get_trigger_type(data); > + int state, post_state; > + > + /* > + * The debounce EIC and latch EIC can only support level trigger, so we > + * can toggle the level trigger to emulate the edge trigger. > + */ > + if ((sprd_eic->type != SPRD_EIC_DEBOUNCE && > + sprd_eic->type != SPRD_EIC_LATCH) || > + !(trigger & IRQ_TYPE_EDGE_BOTH)) > + return; > + > + sprd_eic_irq_mask(data); > + state = sprd_eic_get(chip, offset); > + > +retry: > + switch (sprd_eic->type) { > + case SPRD_EIC_DEBOUNCE: > + if (state) > + sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 0); > + else > + sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 1); > + break; > + case SPRD_EIC_LATCH: > + if (state) > + sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 0); > + else > + sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 1); > + break; > + default: > + sprd_eic_irq_unmask(data); > + return; > + } > + > + post_state = sprd_eic_get(chip, offset); > + if (state != post_state) { > + dev_warn(chip->parent, "EIC level was changed.\n"); > + state = post_state; > + goto retry; > + } > + > + sprd_eic_irq_unmask(data); > +} > + > static int sprd_eic_match_chip_by_type(struct gpio_chip *chip, void *data) > { > enum sprd_eic_type type = *(enum sprd_eic_type *)data; > @@ -448,6 +520,7 @@ static void sprd_eic_handle_one_type(struct gpio_chip *chip) > bank * SPRD_EIC_PER_BANK_NR + n); > > generic_handle_irq(girq); > + sprd_eic_toggle_trigger(chip, girq, n); > } > } > } > -- > 1.7.9.5 > -- Baolin.wang Best Regards