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[209.132.180.67]) by mx.google.com with ESMTP id j10si11202440pfi.326.2018.04.16.15.18.34; Mon, 16 Apr 2018 15:18:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=HgpPul9D; dkim=pass header.i=@codeaurora.org header.s=default header.b=Ukak19d3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752841AbeDPWRH (ORCPT + 99 others); Mon, 16 Apr 2018 18:17:07 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:57852 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752609AbeDPWRE (ORCPT ); Mon, 16 Apr 2018 18:17:04 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 732AF60F6E; Mon, 16 Apr 2018 22:17:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1523917023; bh=QBPD/8VyLsPq8gTO0OMGnDMhaNKKNBYLIZ9QLcCHCjA=; h=From:To:Cc:Subject:Date:From; b=HgpPul9Du4Co/rv6Y+9eV5dZw4u2XiIUa2P/BlH+Lw+IKk0gh3kzL2g/LGgWYPy4+ ss5L80MztJI1254ZPIwI3BEFrhz0FNNtDsd90+P5WHsVIwbm8UJk0HAQEy0Dsj3Uxk fGBaoxt9M/C/rWhjkA/t2CMv2ISjQdnLIqJiwcSw= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0E25760117; Mon, 16 Apr 2018 22:17:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1523917022; bh=QBPD/8VyLsPq8gTO0OMGnDMhaNKKNBYLIZ9QLcCHCjA=; h=From:To:Cc:Subject:Date:From; b=Ukak19d3YonwBPfInb8ELjavhlnBMcy4xhYem4Jrkbe6rQZ18LBY98tpGAg7KHLBI iM1As7HJW+irDovC6eHhJVwct5y4xFlNJWpyWzW056K/FIJSuLqlx3nG6P8/G/JmOn qoC3GJxzuPLoVLzljFCGh9M6Z4Vt8yWnWkV/YK5I= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0E25760117 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: linux-alpha@vger.kernel.org, arnd@arndb.de, timur@codeaurora.org, sulrich@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sinan Kaya , Richard Henderson , Ivan Kokshaysky , Matt Turner , Philippe Ombredanne , Greg Kroah-Hartman , Thomas Gleixner , Kate Stewart , linux-kernel@vger.kernel.org Subject: [PATCH] alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering #2 Date: Mon, 16 Apr 2018 18:16:56 -0400 Message-Id: <1523917017-28084-1-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org memory-barriers.txt has been updated with the following requirement. "When using writel(), a prior wmb() is not needed to guarantee that the cache coherent memory writes have completed before writing to the MMIO region." Current writeX() and iowriteX() implementations on alpha are not satisfying this requirement as the barrier is after the register write. Move mb() in writeX() and iowriteX() functions to guarantee that HW observes memory changes before performing register operations. Signed-off-by: Sinan Kaya Reported-by: Arnd Bergmann --- arch/alpha/kernel/io.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/alpha/kernel/io.c b/arch/alpha/kernel/io.c index 3e3d49c..c025a3e 100644 --- a/arch/alpha/kernel/io.c +++ b/arch/alpha/kernel/io.c @@ -37,20 +37,20 @@ unsigned int ioread32(void __iomem *addr) void iowrite8(u8 b, void __iomem *addr) { - IO_CONCAT(__IO_PREFIX,iowrite8)(b, addr); mb(); + IO_CONCAT(__IO_PREFIX,iowrite8)(b, addr); } void iowrite16(u16 b, void __iomem *addr) { - IO_CONCAT(__IO_PREFIX,iowrite16)(b, addr); mb(); + IO_CONCAT(__IO_PREFIX,iowrite16)(b, addr); } void iowrite32(u32 b, void __iomem *addr) { - IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr); mb(); + IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr); } EXPORT_SYMBOL(ioread8); @@ -176,26 +176,26 @@ u64 readq(const volatile void __iomem *addr) void writeb(u8 b, volatile void __iomem *addr) { - __raw_writeb(b, addr); mb(); + __raw_writeb(b, addr); } void writew(u16 b, volatile void __iomem *addr) { - __raw_writew(b, addr); mb(); + __raw_writew(b, addr); } void writel(u32 b, volatile void __iomem *addr) { - __raw_writel(b, addr); mb(); + __raw_writel(b, addr); } void writeq(u64 b, volatile void __iomem *addr) { - __raw_writeq(b, addr); mb(); + __raw_writeq(b, addr); } EXPORT_SYMBOL(readb); -- 2.7.4