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[209.132.180.67]) by mx.google.com with ESMTP id z3si2681106pgr.340.2018.04.16.21.22.35; Mon, 16 Apr 2018 21:22:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ibm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751191AbeDQEVW (ORCPT + 99 others); Tue, 17 Apr 2018 00:21:22 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:37062 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750764AbeDQEVU (ORCPT ); Tue, 17 Apr 2018 00:21:20 -0400 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w3H4EKkQ136317 for ; Tue, 17 Apr 2018 00:21:20 -0400 Received: from e06smtp14.uk.ibm.com (e06smtp14.uk.ibm.com [195.75.94.110]) by mx0b-001b2d01.pphosted.com with ESMTP id 2hd67xytdu-1 (version=TLSv1.2 cipher=AES256-SHA256 bits=256 verify=NOT) for ; Tue, 17 Apr 2018 00:21:19 -0400 Received: from localhost by e06smtp14.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 17 Apr 2018 05:21:12 +0100 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w3H4LCAI2621950; Tue, 17 Apr 2018 04:21:12 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4963911C064; Tue, 17 Apr 2018 05:13:09 +0100 (BST) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EA0D311C058; Tue, 17 Apr 2018 05:13:08 +0100 (BST) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 17 Apr 2018 05:13:08 +0100 (BST) Received: from [10.61.2.125] (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 87A40A0195; Tue, 17 Apr 2018 14:21:10 +1000 (AEST) Subject: Re: [PATCH 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation To: "Alastair D'Silva" , linuxppc-dev@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, mikey@neuling.org, vaibhav@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com, malat@debian.org, felix@linux.vnet.ibm.com, pombredanne@nexb.com, sukadev@linux.vnet.ibm.com, npiggin@gmail.com, gregkh@linuxfoundation.org, arnd@arndb.de, fbarrat@linux.vnet.ibm.com, corbet@lwn.net, "Alastair D'Silva" References: <20180417020950.21446-1-alastair@au1.ibm.com> <20180417020950.21446-3-alastair@au1.ibm.com> From: Andrew Donnellan Date: Tue, 17 Apr 2018 14:21:10 +1000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180417020950.21446-3-alastair@au1.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-AU Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 18041704-0044-0000-0000-00000549000A X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18041704-0045-0000-0000-000028890B4F Message-Id: <89476138-a279-761a-21be-4a7cd1d80167@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-04-17_02:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1804170039 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17/04/18 12:09, Alastair D'Silva wrote: > From: Alastair D'Silva > > Switch the use of TIDR on it's CPU feature, rather than assuming it > is available based on architecture. > > Signed-off-by: Alastair D'Silva There's a use of TIDR in restore_sprs() that's behind the ARCH_300 flag as well, ideally it should never trigger in the !P9_TIDR case, but you might want to update that too for clarity? > --- > arch/powerpc/kernel/process.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c > index 1237f13fed51..a3e0a3e06d5a 100644 > --- a/arch/powerpc/kernel/process.c > +++ b/arch/powerpc/kernel/process.c > @@ -1570,7 +1570,7 @@ void clear_thread_tidr(struct task_struct *t) > if (!t->thread.tidr) > return; > > - if (!cpu_has_feature(CPU_FTR_ARCH_300)) { > + if (!cpu_has_feature(CPU_FTR_P9_TIDR)) { > WARN_ON_ONCE(1); > return; > } > @@ -1593,7 +1593,7 @@ int set_thread_tidr(struct task_struct *t) > { > int rc; > > - if (!cpu_has_feature(CPU_FTR_ARCH_300)) > + if (!cpu_has_feature(CPU_FTR_P9_TIDR)) > return -EINVAL; > > if (t != current) > -- Andrew Donnellan OzLabs, ADL Canberra andrew.donnellan@au1.ibm.com IBM Australia Limited