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Violators will be prosecuted; Tue, 17 Apr 2018 06:31:11 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w3H5VBUG10355020; Tue, 17 Apr 2018 05:31:11 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 85A01A405F; Tue, 17 Apr 2018 06:23:20 +0100 (BST) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 332D0A4053; Tue, 17 Apr 2018 06:23:20 +0100 (BST) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 17 Apr 2018 06:23:20 +0100 (BST) Received: from adsilva.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 14E01A0195; Tue, 17 Apr 2018 15:31:09 +1000 (AEST) Subject: Re: [PATCH 2/7] powerpc: Use TIDR CPU feature to control TIDR allocation From: "Alastair D'Silva" To: Andrew Donnellan , linuxppc-dev@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, mikey@neuling.org, vaibhav@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com, malat@debian.org, felix@linux.vnet.ibm.com, pombredanne@nexb.com, sukadev@linux.vnet.ibm.com, npiggin@gmail.com, gregkh@linuxfoundation.org, arnd@arndb.de, fbarrat@linux.vnet.ibm.com, corbet@lwn.net Date: Tue, 17 Apr 2018 15:31:08 +1000 In-Reply-To: <89476138-a279-761a-21be-4a7cd1d80167@au1.ibm.com> References: <20180417020950.21446-1-alastair@au1.ibm.com> <20180417020950.21446-3-alastair@au1.ibm.com> <89476138-a279-761a-21be-4a7cd1d80167@au1.ibm.com> Organization: IBM Australia Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.26.6 (3.26.6-1.fc27) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 18041705-0044-0000-0000-000005490660 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18041705-0045-0000-0000-0000288911E4 Message-Id: <1523943068.3246.3.camel@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-04-17_03:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1804170049 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2018-04-17 at 14:21 +1000, Andrew Donnellan wrote: > On 17/04/18 12:09, Alastair D'Silva wrote: > > From: Alastair D'Silva > > > > Switch the use of TIDR on it's CPU feature, rather than assuming it > > is available based on architecture. > > > > Signed-off-by: Alastair D'Silva > > There's a use of TIDR in restore_sprs() that's behind the ARCH_300 > flag > as well, ideally it should never trigger in the !P9_TIDR case, but > you > might want to update that too for clarity? > Thanks for the review, I'll include your suggestions in the next set. -- Alastair D'Silva Open Source Developer Linux Technology Centre, IBM Australia mob: 0423 762 819