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From:   David Wang <davidwang@zhaoxin.com>
To:     'Christoph Hellwig' <hch@infradead.org>
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        <benjaminpan@viatech.com>, <lukelin@viacpu.com>,
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Subject: Re: [PATCH] x86/dma-mapping: override via_no_dac for new VIA PCI bridges
Date:   Tue, 17 Apr 2018 16:44:32 +0800
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> -----?ʼ?ԭ??-----
> ??????: Christoph Hellwig [mailto:hch@infradead.org]
> ????ʱ??: 2018??4??16?? 20:34
> ?ռ???: David Wang <davidwang@zhaoxin.com>
> ????: tglx@linutronix.de; mingo@redhat.com; hpa@zytor.com;
> gregkh@linuxfoundation.org; x86@kernel.org; linux-
> kernel@vger.kernel.org; brucechang@via-alliance.com;
> cooperyan@zhaoxin.com; qiyuanwang@zhaoxin.com;
> benjaminpan@viatech.com; lukelin@viacpu.com; timguo@zhaoxin.com
> ????: Re: [PATCH] x86/dma-mapping: override via_no_dac for new VIA PCI
> bridges
> 
> On Mon, Apr 16, 2018 at 05:26:56PM +0800, David Wang wrote:
> > PCI bridges integrated in new VIA chipset/SoC have no DAC issue.
> > Enable DAC for the platforms with these chipset/SoC can improve DMA
> > performance about 20% when DRAM size > 4GB.
> >
> 
> So we get an exception to an exception?  Is there any way to figure out
the
> PCI IDs actually affected?
Yes.

Do you mean we should list the PCI IDs of the PCI bridges which have no DAC
issue?
There are lots of PCI bridges(PCIE root ports) in our new chipsets/SoCs. And
no DMA issues found. 
So, we only want to recognize the chipset/SoC by reading VID/DID of Bus 0,
Device 17, function 0.

Thx.
---
David