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[209.132.180.67]) by mx.google.com with ESMTP id a139si13538736pfd.308.2018.04.17.03.31.03; Tue, 17 Apr 2018 03:31:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=GMHPjULc; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752784AbeDQK3k (ORCPT + 99 others); Tue, 17 Apr 2018 06:29:40 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:35046 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752634AbeDQK3b (ORCPT ); Tue, 17 Apr 2018 06:29:31 -0400 Received: by mail-wr0-f193.google.com with SMTP id w3so17397772wrg.2 for ; Tue, 17 Apr 2018 03:29:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WqRXfHyKnstdjnry5+I9vhS35j0A2a3YqpankIg7bpg=; b=GMHPjULck8yx9PkT+LgI7ZlRqaqrxciSMqehfip5ynwDfU8pBUli6mX2ItnP9V8zkW 7BrgI0ijel7GzRG9+BePinKRDeB8PtigtI/qT8KBzyaECoMm5+unfJgixtdbC3CWTTA6 NV4Xw8Ol9NHs/Qc/iHCFCF3ceR2tqu+nJGUdckigsQ14bFN4ZfTn0cxEg5oqBit1OUDu KPynueBvkpulnvMLPVcIrgR7CjGijPlDNQakng+isxmk5MY5BDhwtLodMplR+DB7iIya 14JWZ6YtNVrP1z4LFFOHaMZbjEVvixu0DfVucyh50rhSSn/ya+w+c0umWzLAy1iJcQDr SLSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WqRXfHyKnstdjnry5+I9vhS35j0A2a3YqpankIg7bpg=; b=imBN4yaeq6hKSa894P5gPEI3J9mTsIrarjd27R0H3RTJoFV6xJHzlcqw+d3jDXRQ+q NDakVPo4saUwboQFB0Q8qFDwgEzbxfgfPXtnSM3gurGteIAvwknMFtmnGhvxwu1kGlhM 7+6jsnptcU36Ru7EGAuxaXYrjRVyvZRfoFVkRHo2JCYwGNd1PTPz6DHVMSBoGTz5t1sY 02UXB0zEz71gEqZ1HibLfvmzRwujGj5nIhhlXP9KYc+3OmCFH5DcTuMceo4+GeA/KsPZ 3Q+E8XMJtAn18MYqdKDtfHe14t28hEeUwfGqObFrLa3GXFIES5beZPnQvJ0hJKbsesPI SEvw== X-Gm-Message-State: ALQs6tAsdgtTrdZ4OhKdU+PRIyObop/DMSmvaswv3M/wkrsmtsgKB4WP FxX4Fwe7k0xVbWiVXRs1Uvzj/g== X-Received: by 10.223.227.73 with SMTP id n9mr1185043wrj.134.1523960969607; Tue, 17 Apr 2018 03:29:29 -0700 (PDT) Received: from brgl-bgdev.home ([2a01:cb1d:af:5b00:e837:b8d5:48c1:571b]) by smtp.gmail.com with ESMTPSA id r75sm8842252wmf.34.2018.04.17.03.29.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Apr 2018 03:29:29 -0700 (PDT) From: Bartosz Golaszewski To: Sekhar Nori , Kevin Hilman , Russell King , Santosh Shilimkar Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [RESEND PATCH v2 4/4] ARM: davinci: use aemif platform driver in legacy mode for da850-evm Date: Tue, 17 Apr 2018 12:29:17 +0200 Message-Id: <20180417102917.7794-5-brgl@bgdev.pl> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180417102917.7794-1-brgl@bgdev.pl> References: <20180417102917.7794-1-brgl@bgdev.pl> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski We now support board files in aemif. Use the platform driver instead of the handcrafted API in da850-evm. Note: the id of davinci_nand is changed to 0 in order to make it work with the new common-clock framework based psc driver. Signed-off-by: Bartosz Golaszewski --- arch/arm/mach-davinci/board-da850-evm.c | 93 ++++++++++++++----------- 1 file changed, 51 insertions(+), 42 deletions(-) diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 78a670aafea0..f1c2c8c8c4af 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include #include @@ -185,16 +186,6 @@ static struct resource da850_evm_norflash_resource[] = { }, }; -static struct platform_device da850_evm_norflash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &da850_evm_norflash_data, - }, - .num_resources = 1, - .resource = da850_evm_norflash_resource, -}; - /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash * (128K blocks). It may be used instead of the (default) SPI flash * to boot, using TI's tools to install the secondary boot loader @@ -265,37 +256,58 @@ static struct resource da850_evm_nandflash_resource[] = { }, }; -static struct platform_device da850_evm_nandflash_device = { - .name = "davinci_nand", - .id = 1, - .dev = { - .platform_data = &da850_evm_nandflash_data, - }, - .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), - .resource = da850_evm_nandflash_resource, +static struct resource da850_evm_aemif_resource[] = { + { + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K, + .flags = IORESOURCE_MEM, + } }; -static struct platform_device *da850_evm_devices[] = { - &da850_evm_nandflash_device, - &da850_evm_norflash_device, +static struct aemif_abus_data da850_evm_aemif_abus_data[] = { + { + .cs = 3, + } }; -#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 -#define DA8XX_AEMIF_ASIZE_16BIT 0x1 - -static void __init da850_evm_init_nor(void) -{ - void __iomem *aemif_addr; - - aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K); +static struct platform_device da850_evm_aemif_devices[] = { + { + .name = "davinci_nand", + .id = 0, + .dev = { + .platform_data = &da850_evm_nandflash_data, + }, + .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), + .resource = da850_evm_nandflash_resource, + }, + { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &da850_evm_norflash_data, + }, + .num_resources = 1, + .resource = da850_evm_norflash_resource, + } +}; - /* Configure data bus width of CS2 to 16 bit */ - writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) | - DA8XX_AEMIF_ASIZE_16BIT, - aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET); +static struct aemif_platform_data da850_evm_aemif_pdata = { + .cs_offset = 2, + .abus_data = da850_evm_aemif_abus_data, + .num_abus_data = ARRAY_SIZE(da850_evm_aemif_abus_data), + .sub_devices = da850_evm_aemif_devices, + .num_sub_devices = ARRAY_SIZE(da850_evm_aemif_devices), +}; - iounmap(aemif_addr); -} +static struct platform_device da850_evm_aemif_device = { + .name = "ti-aemif", + .dev = { + .platform_data = &da850_evm_aemif_pdata, + }, + .resource = da850_evm_aemif_resource, + .num_resources = ARRAY_SIZE(da850_evm_aemif_resource), + .id = -1, +}; static const short da850_evm_nand_pins[] = { DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, @@ -338,13 +350,10 @@ static inline void da850_evm_setup_nor_nand(void) pr_warn("%s: NOR mux setup failed: %d\n", __func__, ret); - da850_evm_init_nor(); - - platform_add_devices(da850_evm_devices, - ARRAY_SIZE(da850_evm_devices)); - - if (davinci_aemif_setup(&da850_evm_nandflash_device)) - pr_warn("%s: Cannot configure AEMIF.\n", __func__); + ret = platform_device_register(&da850_evm_aemif_device); + if (ret) + pr_warn("%s: registering aemif failed: %d\n", + __func__, ret); } } -- 2.17.0