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[209.132.180.67]) by mx.google.com with ESMTP id q1si11841120pgr.455.2018.04.17.06.43.46; Tue, 17 Apr 2018 06:44:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753924AbeDQNky (ORCPT + 99 others); Tue, 17 Apr 2018 09:40:54 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:7591 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753549AbeDQNjm (ORCPT ); Tue, 17 Apr 2018 09:39:42 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3HDcnAh021164; Tue, 17 Apr 2018 15:39:06 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hbd6cy2uh-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 17 Apr 2018 15:39:06 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9012538; Tue, 17 Apr 2018 13:39:01 +0000 (GMT) Received: from Webmail-eu.st.com (gpxdag5node6.st.com [10.75.127.79]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4EAA64ECE; Tue, 17 Apr 2018 13:39:01 +0000 (GMT) Received: from localhost (10.75.127.123) by GPXDAG5NODE6.st.com (10.75.127.79) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 17 Apr 2018 15:39:00 +0200 From: Fabrice Gasnier To: , CC: , , , , , , , , , , , , Subject: [PATCH v5 1/6] dt-bindings: mfd: stm32-timers: add support for dmas Date: Tue, 17 Apr 2018 15:38:28 +0200 Message-ID: <1523972313-28765-2-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1523972313-28765-1-git-send-email-fabrice.gasnier@st.com> References: <1523972313-28765-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.123] X-ClientProxiedBy: GPXDAG4NODE6.st.com (10.75.127.76) To GPXDAG5NODE6.st.com (10.75.127.79) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-04-17_07:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for DMAs to STM32 timers. STM32 Timers can support up to 7 dma requests: up to 4 channels, update, compare and trigger. DMAs may be used to transfer data from pwm capture for instance. DMA support is made optional, PWM capture support is also an option. This is much more wise system-wide to avoid shortage on DMA request lines as there's significant amount of timer instances that can request up to 7 channels. Signed-off-by: Fabrice Gasnier Reviewed-by: Rob Herring Reviewed-by: Benjamin Gaignard --- .../devicetree/bindings/mfd/stm32-timers.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt index 1db6e00..0e900b5 100644 --- a/Documentation/devicetree/bindings/mfd/stm32-timers.txt +++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt @@ -19,6 +19,11 @@ Required parameters: Optional parameters: - resets: Phandle to the parent reset controller. See ../reset/st,stm32-rcc.txt +- dmas: List of phandle to dma channels that can be used for + this timer instance. There may be up to 7 dma channels. +- dma-names: List of dma names. Must match 'dmas' property. Valid + names are: "ch1", "ch2", "ch3", "ch4", "up", "trig", + "com". Optional subnodes: - pwm: See ../pwm/pwm-stm32.txt @@ -44,3 +49,18 @@ Example: reg = <0>; }; }; + +Example with all dmas: + timer@40010000 { + ... + dmas = <&dmamux1 11 0x400 0x0>, + <&dmamux1 12 0x400 0x0>, + <&dmamux1 13 0x400 0x0>, + <&dmamux1 14 0x400 0x0>, + <&dmamux1 15 0x400 0x0>, + <&dmamux1 16 0x400 0x0>, + <&dmamux1 17 0x400 0x0>; + dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig", "com"; + ... + child nodes... + }; -- 1.9.1