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[209.132.180.67]) by mx.google.com with ESMTP id q12-v6si10256674pll.467.2018.04.17.06.49.18; Tue, 17 Apr 2018 06:49:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753841AbeDQNqg (ORCPT + 99 others); Tue, 17 Apr 2018 09:46:36 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:32123 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753282AbeDQNp4 (ORCPT ); Tue, 17 Apr 2018 09:45:56 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3HDiJNr030308; Tue, 17 Apr 2018 15:45:35 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2hb6s6gwgr-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 17 Apr 2018 15:45:35 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 8B6CB3D; Tue, 17 Apr 2018 13:45:34 +0000 (GMT) Received: from Webmail-eu.st.com (gpxdag5node6.st.com [10.75.127.79]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 734E84EFB; Tue, 17 Apr 2018 13:45:34 +0000 (GMT) Received: from localhost (10.75.127.116) by GPXDAG5NODE6.st.com (10.75.127.79) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 17 Apr 2018 15:45:33 +0200 From: Fabrice Gasnier To: , CC: , , , , , Subject: [PATCH 2/4] ARM: dts: stm32: add PWM pins used on stm32mp157c-ev1 board Date: Tue, 17 Apr 2018 15:45:28 +0200 Message-ID: <1523972730-29240-3-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1523972730-29240-1-git-send-email-fabrice.gasnier@st.com> References: <1523972730-29240-1-git-send-email-fabrice.gasnier@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.116] X-ClientProxiedBy: GPXDAG5NODE4.st.com (10.75.127.77) To GPXDAG5NODE6.st.com (10.75.127.79) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-04-17_07:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org stm32mp157c evaluation board has following PWM pins available on GPIO expansion connector: - TIM2_CH4 (PA3) - TIM8_CH4 (PI2) - TIM12_CH1 (PH6) Signed-off-by: Fabrice Gasnier --- arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi index 6f044100..867cfeb 100644 --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi @@ -158,6 +158,33 @@ bias-disable; }; }; + + pwm2_pins_a: pwm2@0 { + pins { + pinmux = ; /* TIM2_CH4 */ + bias-pull-down; + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm8_pins_a: pwm8@0 { + pins { + pinmux = ; /* TIM8_CH4 */ + bias-pull-down; + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm12_pins_a: pwm12@0 { + pins { + pinmux = ; /* TIM12_CH1 */ + bias-pull-down; + drive-push-pull; + slew-rate = <0>; + }; + }; }; pinctrl_z: pin-controller-z { -- 1.9.1